[2SF] Minor template removal.
--- a/src/in_2sf/desmume/MMU.cpp
+++ b/src/in_2sf/desmume/MMU.cpp
@@ -214,7 +214,7 @@
// NOTE - this whole approach is probably fundamentally wrong.
// according to dasShiny research, its possible to map multiple banks to the same addresses. something more sophisticated would be needed.
// however, it hasnt proven necessary yet for any known test case.
-template<int PROCNUM> static inline uint32_t MMU_LCDmap(uint32_t addr, bool &unmapped, bool &restricted)
+static inline uint32_t MMU_LCDmap(int PROCNUM, uint32_t addr, bool &unmapped, bool &restricted)
{
unmapped = false;
restricted = false; // this will track whether 8bit writes are allowed
@@ -988,7 +988,7 @@
// TODO:
// NAND flash support (used in Made in Ore/WarioWare D.I.Y.)
-template<int PROCNUM> void FASTCALL MMU_writeToGCControl(uint32_t val)
+void FASTCALL MMU_writeToGCControl(int PROCNUM, uint32_t val)
{
int TEST_PROCNUM = PROCNUM;
nds_dscard &card = MMU.dscard[TEST_PROCNUM];
@@ -1069,7 +1069,7 @@
triggerDma(EDMAMode_Card);
}
-template<int PROCNUM> uint32_t MMU_readFromGC()
+uint32_t MMU_readFromGC(int PROCNUM)
{
int TEST_PROCNUM = PROCNUM;
@@ -1109,7 +1109,7 @@
return val;
}
-template<int PROCNUM> static void REG_IF_WriteByte(uint32_t addr, uint8_t val)
+static void REG_IF_WriteByte(int PROCNUM, uint32_t addr, uint8_t val)
{
// the following bits are generated from logic and should not be affected here
// Bit 21 NDS9 only: Geometry Command FIFO
@@ -1132,18 +1132,18 @@
NDS_Reschedule();
}
-template<int PROCNUM> static void REG_IF_WriteWord(uint32_t addr, uint16_t val)
-{
- REG_IF_WriteByte<PROCNUM>(addr, val & 0xFF);
- REG_IF_WriteByte<PROCNUM>(addr + 1, (val >> 8) & 0xFF);
-}
-
-template<int PROCNUM> static void REG_IF_WriteLong(uint32_t val)
-{
- REG_IF_WriteByte<PROCNUM>(0, val & 0xFF);
- REG_IF_WriteByte<PROCNUM>(1, (val >> 8) & 0xFF);
- REG_IF_WriteByte<PROCNUM>(2, (val >> 16) & 0xFF);
- REG_IF_WriteByte<PROCNUM>(3, (val >> 24) & 0xFF);
+static void REG_IF_WriteWord(int PROCNUM, uint32_t addr, uint16_t val)
+{
+ REG_IF_WriteByte(PROCNUM, addr, val & 0xFF);
+ REG_IF_WriteByte(PROCNUM, addr + 1, (val >> 8) & 0xFF);
+}
+
+static void REG_IF_WriteLong(int PROCNUM, uint32_t val)
+{
+ REG_IF_WriteByte(PROCNUM, 0, val & 0xFF);
+ REG_IF_WriteByte(PROCNUM, 1, (val >> 8) & 0xFF);
+ REG_IF_WriteByte(PROCNUM, 2, (val >> 16) & 0xFF);
+ REG_IF_WriteByte(PROCNUM, 3, (val >> 24) & 0xFF);
}
template<int PROCNUM> uint32_t MMU_struct::gen_IF()
@@ -1650,16 +1650,16 @@
#endif
case REG_IF:
- REG_IF_WriteByte<ARMCPU_ARM9>(0, val);
+ REG_IF_WriteByte(ARMCPU_ARM9, 0, val);
break;
case REG_IF + 1:
- REG_IF_WriteByte<ARMCPU_ARM9>(1, val);
+ REG_IF_WriteByte(ARMCPU_ARM9, 1, val);
break;
case REG_IF + 2:
- REG_IF_WriteByte<ARMCPU_ARM9>(2, val);
+ REG_IF_WriteByte(ARMCPU_ARM9, 2, val);
break;
case REG_IF + 3:
- REG_IF_WriteByte<ARMCPU_ARM9>(3, val);
+ REG_IF_WriteByte(ARMCPU_ARM9, 3, val);
break;
case REG_VRAMCNTA:
@@ -1779,10 +1779,11 @@
MMU.reg_IE[ARMCPU_ARM9] = (MMU.reg_IE[ARMCPU_ARM9] & 0xFFFF) | (val << 16);
return;
case REG_IF:
- REG_IF_WriteWord<ARMCPU_ARM9>(0, val);
- return;
- case REG_IF+2:
- REG_IF_WriteWord<ARMCPU_ARM9>(2, val); return;
+ REG_IF_WriteWord(ARMCPU_ARM9, 0, val);
+ return;
+ case REG_IF + 2:
+ REG_IF_WriteWord(ARMCPU_ARM9, 2, val);
+ return;
case REG_IPCSYNC:
MMU_IPCSync(ARMCPU_ARM9, val);
@@ -1808,10 +1809,10 @@
}
case REG_GCROMCTRL:
- MMU_writeToGCControl<ARMCPU_ARM9>((T1ReadLong(MMU.MMU_MEM[ARMCPU_ARM9][0x40], 0x1A4) & 0xFFFF0000) | val);
+ MMU_writeToGCControl(ARMCPU_ARM9, (T1ReadLong(MMU.MMU_MEM[ARMCPU_ARM9][0x40], 0x1A4) & 0xFFFF0000) | val);
return;
case REG_GCROMCTRL + 2:
- MMU_writeToGCControl<ARMCPU_ARM9>((T1ReadLong(MMU.MMU_MEM[ARMCPU_ARM9][0x40], 0x1A4) & 0xFFFF) | (val << 16));
+ MMU_writeToGCControl(ARMCPU_ARM9, (T1ReadLong(MMU.MMU_MEM[ARMCPU_ARM9][0x40], 0x1A4) & 0xFFFF) | (val << 16));
return;
}
@@ -1820,7 +1821,7 @@
}
bool unmapped, restricted;
- adr = MMU_LCDmap<ARMCPU_ARM9>(adr, unmapped, restricted);
+ adr = MMU_LCDmap(ARMCPU_ARM9, adr, unmapped, restricted);
if (unmapped)
return;
@@ -1892,7 +1893,7 @@
return;
case REG_IF:
- REG_IF_WriteLong<ARMCPU_ARM9>(val);
+ REG_IF_WriteLong(ARMCPU_ARM9, val);
return;
case REG_TM0CNTL:
@@ -1953,7 +1954,7 @@
return;
case REG_GCROMCTRL:
- MMU_writeToGCControl<ARMCPU_ARM9>(val);
+ MMU_writeToGCControl(ARMCPU_ARM9, val);
return;
case REG_DISPA_DISPCAPCNT:
T1WriteLong(MMU.ARM9_REG, 0x64, val);
@@ -1969,7 +1970,7 @@
}
bool unmapped, restricted;
- adr = MMU_LCDmap<ARMCPU_ARM9>(adr, unmapped, restricted);
+ adr = MMU_LCDmap(ARMCPU_ARM9, adr, unmapped, restricted);
if (unmapped)
return;
@@ -2047,7 +2048,7 @@
}
bool unmapped, restricted;
- adr = MMU_LCDmap<ARMCPU_ARM9>(adr, unmapped, restricted);
+ adr = MMU_LCDmap(ARMCPU_ARM9, adr, unmapped, restricted);
if (unmapped)
return 0;
@@ -2181,7 +2182,7 @@
}
case REG_GCDATAIN:
- return MMU_readFromGC<ARMCPU_ARM9>();
+ return MMU_readFromGC(ARMCPU_ARM9);
}
return T1ReadLong_guaranteedAligned(MMU.MMU_MEM[ARMCPU_ARM9][adr >> 20], adr & MMU.MMU_MASK[ARMCPU_ARM9][adr >> 20]);
}
@@ -2227,16 +2228,16 @@
switch (adr)
{
case REG_IF:
- REG_IF_WriteByte<ARMCPU_ARM7>(0, val);
+ REG_IF_WriteByte(ARMCPU_ARM7, 0, val);
break;
case REG_IF + 1:
- REG_IF_WriteByte<ARMCPU_ARM7>(1, val);
+ REG_IF_WriteByte(ARMCPU_ARM7, 1, val);
break;
case REG_IF + 2:
- REG_IF_WriteByte<ARMCPU_ARM7>(2, val);
+ REG_IF_WriteByte(ARMCPU_ARM7, 2, val);
break;
case REG_IF + 3:
- REG_IF_WriteByte<ARMCPU_ARM7>(3, val);
+ REG_IF_WriteByte(ARMCPU_ARM7, 3, val);
break;
case REG_POSTFLG:
@@ -2530,10 +2531,10 @@
return;
case REG_IF:
- REG_IF_WriteWord<ARMCPU_ARM7>(0, val);
+ REG_IF_WriteWord(ARMCPU_ARM7, 0, val);
return;
case REG_IF + 2:
- REG_IF_WriteWord<ARMCPU_ARM7>(2, val);
+ REG_IF_WriteWord(ARMCPU_ARM7, 2, val);
return;
case REG_IPCSYNC:
@@ -2560,10 +2561,10 @@
}
case REG_GCROMCTRL:
- MMU_writeToGCControl<ARMCPU_ARM7>((T1ReadLong(MMU.MMU_MEM[ARMCPU_ARM7][0x40], 0x1A4) & 0xFFFF0000) | val);
+ MMU_writeToGCControl(ARMCPU_ARM7, (T1ReadLong(MMU.MMU_MEM[ARMCPU_ARM7][0x40], 0x1A4) & 0xFFFF0000) | val);
return;
case REG_GCROMCTRL + 2:
- MMU_writeToGCControl<ARMCPU_ARM7>((T1ReadLong(MMU.MMU_MEM[ARMCPU_ARM7][0x40], 0x1A4) & 0xFFFF) | (val << 16));
+ MMU_writeToGCControl(ARMCPU_ARM7, (T1ReadLong(MMU.MMU_MEM[ARMCPU_ARM7][0x40], 0x1A4) & 0xFFFF) | (val << 16));
return;
}
@@ -2619,7 +2620,7 @@
return;
case REG_IF:
- REG_IF_WriteLong<ARMCPU_ARM7>(val);
+ REG_IF_WriteLong(ARMCPU_ARM7, val);
return;
case REG_TM0CNTL:
@@ -2645,7 +2646,7 @@
return;
case REG_GCROMCTRL:
- MMU_writeToGCControl<ARMCPU_ARM7>(val);
+ MMU_writeToGCControl(ARMCPU_ARM7, val);
return;
case REG_GCDATAIN:
@@ -2818,7 +2819,7 @@
case REG_GCROMCTRL:
break;
case REG_GCDATAIN:
- return MMU_readFromGC<ARMCPU_ARM7>();
+ return MMU_readFromGC(ARMCPU_ARM7);
case REG_VRAMSTAT:
// make sure WRAMSTAT is stashed and then fallthrough return the value from memory. i know, gross.
--- a/src/in_2sf/desmume/SPU.cpp
+++ b/src/in_2sf/desmume/SPU.cpp
@@ -787,7 +787,7 @@
//////////////////////////////////////////////////////////////////////////////
-template<SPUInterpolationMode INTERPOLATE_MODE> static inline int32_t Interpolate(int32_t a, int32_t b, double ratio)
+static inline int32_t Interpolate(int32_t a, int32_t b, double ratio, SPUInterpolationMode INTERPOLATE_MODE)
{
double sampleA = static_cast<double>(a);
double sampleB = static_cast<double>(b);
@@ -817,7 +817,7 @@
//////////////////////////////////////////////////////////////////////////////
-template<SPUInterpolationMode INTERPOLATE_MODE> static inline void Fetch8BitData(channel_struct *chan, int32_t *data)
+static inline void Fetch8BitData(const channel_struct *const chan, int32_t *const data, SPUInterpolationMode INTERPOLATE_MODE)
{
if (chan->sampcnt < 0)
{
@@ -832,7 +832,7 @@
if (loc < (chan->totlength << 2) - 1)
{
int32_t b = static_cast<int32_t>(read_s8(chan->addr + loc + 1) << 8);
- a = Interpolate<INTERPOLATE_MODE>(a, b, chan->sampcnt);
+ a = Interpolate(a, b, chan->sampcnt, INTERPOLATE_MODE);
}
*data = a;
}
@@ -840,7 +840,7 @@
*data = static_cast<int32_t>(read_s8(chan->addr + loc) << 8);
}
-template<SPUInterpolationMode INTERPOLATE_MODE> static inline void Fetch16BitData(const channel_struct * const chan, int32_t *data)
+static inline void Fetch16BitData(const channel_struct *const chan, int32_t *const data, SPUInterpolationMode INTERPOLATE_MODE)
{
if (chan->sampcnt < 0)
{
@@ -848,7 +848,7 @@
return;
}
- if(INTERPOLATE_MODE != SPUInterpolation_None)
+ if (INTERPOLATE_MODE != SPUInterpolation_None)
{
uint32_t loc = u32floor(chan->sampcnt);
@@ -856,7 +856,7 @@
if (loc < (chan->totlength << 1) - 1)
{
int32_t b = static_cast<int32_t>(read16(loc * 2 + chan->addr + 2));
- a = Interpolate<INTERPOLATE_MODE>(a, b, chan->sampcnt);
+ a = Interpolate(a, b, chan->sampcnt, INTERPOLATE_MODE);
}
*data = a;
}
@@ -864,7 +864,7 @@
*data = read16(chan->addr + u32floor(chan->sampcnt) * 2);
}
-template<SPUInterpolationMode INTERPOLATE_MODE> static inline void FetchADPCMData(channel_struct * const chan, int32_t * const data)
+static inline void FetchADPCMData(channel_struct *const chan, int32_t *const data, SPUInterpolationMode INTERPOLATE_MODE)
{
if (chan->sampcnt < 8)
{
@@ -900,7 +900,7 @@
}
if (INTERPOLATE_MODE != SPUInterpolation_None)
- *data = Interpolate<INTERPOLATE_MODE>(static_cast<int32_t>(chan->pcm16b_last), static_cast<int32_t>(chan->pcm16b), chan->sampcnt);
+ *data = Interpolate(static_cast<int32_t>(chan->pcm16b_last), static_cast<int32_t>(chan->pcm16b), chan->sampcnt, INTERPOLATE_MODE);
else
*data = static_cast<int32_t>(chan->pcm16b);
}
@@ -969,7 +969,7 @@
//////////////////////////////////////////////////////////////////////////////
-template<int FORMAT> static inline void TestForLoop(SPU_struct *SPU, channel_struct *chan)
+static inline void TestForLoop(SPU_struct *SPU, channel_struct *chan, int FORMAT)
{
int shift = !FORMAT ? 2 : 1;
@@ -1026,7 +1026,7 @@
}
}
-template<int CHANNELS> static inline void SPU_Mix(SPU_struct *SPU, channel_struct *chan, int32_t data)
+static inline void SPU_Mix(SPU_struct *SPU, channel_struct *chan, int32_t data, int CHANNELS)
{
switch (CHANNELS)
{
@@ -1043,7 +1043,7 @@
}
// WORK
-template<int FORMAT, SPUInterpolationMode INTERPOLATE_MODE, int CHANNELS> static inline void ____SPU_ChanUpdate(SPU_struct *const SPU, channel_struct *const chan)
+static inline void ____SPU_ChanUpdate(SPU_struct *const SPU, channel_struct *const chan, int FORMAT, SPUInterpolationMode INTERPOLATE_MODE, int CHANNELS)
{
for (; SPU->bufpos < SPU->buflength; ++SPU->bufpos)
{
@@ -1053,25 +1053,25 @@
switch (FORMAT)
{
case 0:
- Fetch8BitData<INTERPOLATE_MODE>(chan, &data);
+ Fetch8BitData(chan, &data, INTERPOLATE_MODE);
break;
case 1:
- Fetch16BitData<INTERPOLATE_MODE>(chan, &data);
+ Fetch16BitData(chan, &data, INTERPOLATE_MODE);
break;
case 2:
- FetchADPCMData<INTERPOLATE_MODE>(chan, &data);
+ FetchADPCMData(chan, &data, INTERPOLATE_MODE);
break;
case 3:
FetchPSGData(chan, &data);
}
- SPU_Mix<CHANNELS>(SPU, chan, data);
+ SPU_Mix(SPU, chan, data, CHANNELS);
}
switch (FORMAT)
{
case 0:
case 1:
- TestForLoop<FORMAT>(SPU, chan);
+ TestForLoop(SPU, chan, FORMAT);
break;
case 2:
TestForLoop2(SPU, chan);
@@ -1082,33 +1082,33 @@
}
}
-template<int FORMAT, SPUInterpolationMode INTERPOLATE_MODE> static inline void ___SPU_ChanUpdate(bool actuallyMix, SPU_struct *const SPU, channel_struct *const chan)
+static inline void ___SPU_ChanUpdate(bool actuallyMix, SPU_struct *const SPU, channel_struct *const chan, int FORMAT, SPUInterpolationMode INTERPOLATE_MODE)
{
if (!actuallyMix)
- ____SPU_ChanUpdate<FORMAT, INTERPOLATE_MODE, -1>(SPU, chan);
+ ____SPU_ChanUpdate(SPU, chan, FORMAT, INTERPOLATE_MODE, -1);
else if (!chan->pan)
- ____SPU_ChanUpdate<FORMAT, INTERPOLATE_MODE, 0>(SPU, chan);
+ ____SPU_ChanUpdate(SPU, chan, FORMAT, INTERPOLATE_MODE, 0);
else if (chan->pan == 127)
- ____SPU_ChanUpdate<FORMAT, INTERPOLATE_MODE, 2>(SPU, chan);
+ ____SPU_ChanUpdate(SPU, chan, FORMAT, INTERPOLATE_MODE, 2);
else
- ____SPU_ChanUpdate<FORMAT, INTERPOLATE_MODE, 1>(SPU, chan);
-}
-
-template<SPUInterpolationMode INTERPOLATE_MODE> static inline void __SPU_ChanUpdate(bool actuallyMix, SPU_struct *const SPU, channel_struct *const chan)
+ ____SPU_ChanUpdate(SPU, chan, FORMAT, INTERPOLATE_MODE, 1);
+}
+
+static inline void __SPU_ChanUpdate(bool actuallyMix, SPU_struct *const SPU, channel_struct *const chan, SPUInterpolationMode INTERPOLATE_MODE)
{
switch (chan->format)
{
case 0:
- ___SPU_ChanUpdate<0, INTERPOLATE_MODE>(actuallyMix, SPU, chan);
+ ___SPU_ChanUpdate(actuallyMix, SPU, chan, 0, INTERPOLATE_MODE);
break;
case 1:
- ___SPU_ChanUpdate<1, INTERPOLATE_MODE>(actuallyMix, SPU, chan);
+ ___SPU_ChanUpdate(actuallyMix, SPU, chan, 1, INTERPOLATE_MODE);
break;
case 2:
- ___SPU_ChanUpdate<2, INTERPOLATE_MODE>(actuallyMix, SPU, chan);
+ ___SPU_ChanUpdate(actuallyMix, SPU, chan, 2, INTERPOLATE_MODE);
break;
case 3:
- ___SPU_ChanUpdate<3, INTERPOLATE_MODE>(actuallyMix, SPU, chan);
+ ___SPU_ChanUpdate(actuallyMix, SPU, chan, 3, INTERPOLATE_MODE);
break;
default:
assert(false);
@@ -1120,13 +1120,13 @@
switch (CommonSettings.spuInterpolationMode)
{
case SPUInterpolation_None:
- __SPU_ChanUpdate<SPUInterpolation_None>(actuallyMix, SPU, chan);
+ __SPU_ChanUpdate(actuallyMix, SPU, chan, SPUInterpolation_None);
break;
case SPUInterpolation_Linear:
- __SPU_ChanUpdate<SPUInterpolation_Linear>(actuallyMix, SPU, chan);
+ __SPU_ChanUpdate(actuallyMix, SPU, chan, SPUInterpolation_Linear);
break;
case SPUInterpolation_Cosine:
- __SPU_ChanUpdate<SPUInterpolation_Cosine>(actuallyMix, SPU, chan);
+ __SPU_ChanUpdate(actuallyMix, SPU, chan, SPUInterpolation_Cosine);
break;
default:
assert(false);
--- a/src/in_2sf/desmume/version.cpp
+++ b/src/in_2sf/desmume/version.cpp
@@ -32,7 +32,7 @@
#define DESMUME_NAME "DeSmuME"
-#if defined(__x86_64__) || defined(__LP64) || defined(__IA64__) || defined(_M_X64) || defined(_WIN64)
+#if defined(__x86_64__) || defined(__LP64) || defined(__IA64__) || defined(_M_X64) || defined(_WIN64)
# define DESMUME_PLATFORM_STRING " x64"
#elif defined(__i386__) || defined(_M_IX86) || defined(_WIN32)
# define DESMUME_PLATFORM_STRING " x86"