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Use #pragma once instead of include guards.

Naram Qashat authored on 2014/09/08 14:47:36
Showing 1 changed files
src/in_2sf/desmume/cp15.h
History View file @ b6add6e
... ... 
@@ -16,8 +16,7 @@
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 	along with the this software.  If not, see <http://www.gnu.org/licenses/>.
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 */
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-#ifndef __CP15_H__
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-#define __CP15_H__
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+#pragma once
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 #include "armcpu.h"
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@@ -110,5 +109,3 @@ public:
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 extern armcp15_t cp15;
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 void maskPrecalc();
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-
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-#endif /* __CP15_H__*/
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Updating in_2sf to use a newish version of DeSmuME, 0.9.9 from SVN. Somewhat cleaned up as well, but not everything because it's a pain in the ass.

Naram Qashat authored on 2013/04/18 17:22:55
Showing 1 changed files
src/in_2sf/desmume/cp15.h
History View file @ dfb7763
... ... 
@@ -21,8 +21,19 @@
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 #include "armcpu.h"
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+const uint32_t CP15_ACCESS_WRITE = 0;
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+const uint32_t CP15_ACCESS_READ = 2;
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+const uint32_t CP15_ACCESS_EXECUTE = 4;
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+const uint32_t CP15_ACCESS_WRITEUSR = CP15_ACCESS_WRITE;
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+const uint32_t CP15_ACCESS_WRITESYS = 1;
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+const uint32_t CP15_ACCESS_READUSR = CP15_ACCESS_READ;
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+const uint32_t CP15_ACCESS_READSYS = 3;
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+const uint32_t CP15_ACCESS_EXECUSR = CP15_ACCESS_EXECUTE;
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+const uint32_t CP15_ACCESS_EXECSYS = 5;
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+
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 struct armcp15_t
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 {
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+public:
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 	uint32_t IDCode;
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 	uint32_t cacheType;
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 	uint32_t TCMSize;
... ... 
@@ -66,24 +77,38 @@ struct armcp15_t
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 	uint32_t regionExecuteSet_SYS[8];
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 	armcpu_t *cpu;
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-};
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-armcp15_t *armcp15_new(armcpu_t *c);
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-//bool armcp15_dataProcess(armcp15_t *armcp15, uint8_t CRd, uint8_t CRn, uint8_t CRm, uint8_t opcode1, uint8_t opcode2);
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-//bool armcp15_load(armcp15_t *armcp15, uint8_t CRd, uint8_t adr);
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-//bool armcp15_store(armcp15_t *armcp15, uint8_t CRd, uint8_t adr);
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-bool armcp15_moveCP2ARM(armcp15_t *armcp15, uint32_t * R, uint8_t CRn, uint8_t CRm, uint8_t opcode1, uint8_t opcode2);
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-bool armcp15_moveARM2CP(armcp15_t *armcp15, uint32_t val, uint8_t CRn, uint8_t CRm, uint8_t opcode1, uint8_t opcode2);
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-//bool armcp15_isAccessAllowed(armcp15_t *armcp15,uint32_t address,uint32_t access);
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+	void setSingleRegionAccess(uint32_t dAccess, uint32_t iAccess, unsigned char num, uint32_t mask, uint32_t set);
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+	void maskPrecalc();
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+
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+public:
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+	armcp15_t() : IDCode(0), cacheType(0), TCMSize(0), ctrl(0), DCConfig(0), ICConfig(0), writeBuffCtrl(0), und(0), DaccessPerm(0), IaccessPerm(0), protectBaseSize0(0), protectBaseSize1(0), protectBaseSize2(0),
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+		protectBaseSize3(0), protectBaseSize4(0), protectBaseSize5(0), protectBaseSize6(0), protectBaseSize7(0), cacheOp(0), DcacheLock(0), IcacheLock(0), ITCMRegion(0), DTCMRegion(0), processID(0), RAM_TAG(0),
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+		testState(0), cacheDbg(0), cpu(nullptr)
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+	{
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+		memset(&this->regionWriteMask_USR[0], 0, sizeof(this->regionWriteMask_USR));
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+		memset(&this->regionWriteMask_SYS[0], 0, sizeof(this->regionWriteMask_SYS));
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+		memset(&this->regionReadMask_USR[0], 0, sizeof(this->regionReadMask_USR));
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+		memset(&this->regionReadMask_SYS[0], 0, sizeof(this->regionReadMask_SYS));
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+		memset(&this->regionExecuteMask_USR[0], 0, sizeof(this->regionExecuteMask_USR));
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+		memset(&this->regionExecuteMask_SYS[0], 0, sizeof(this->regionExecuteMask_SYS));
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+		memset(&this->regionWriteSet_USR[0], 0, sizeof(this->regionWriteSet_USR));
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+		memset(&this->regionWriteSet_SYS[0], 0, sizeof(this->regionWriteSet_SYS));
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+		memset(&this->regionReadSet_USR[0], 0, sizeof(this->regionReadSet_USR));
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+		memset(&this->regionReadSet_SYS[0], 0, sizeof(this->regionReadSet_SYS));
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+		memset(&this->regionExecuteSet_USR[0], 0, sizeof(this->regionExecuteSet_USR));
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+		memset(&this->regionExecuteSet_SYS[0], 0, sizeof(this->regionExecuteSet_SYS));
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+	}
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+	bool reset(armcpu_t *c);
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+	bool dataProcess(uint8_t CRd, uint8_t CRn, uint8_t CRm, uint8_t opcode1, uint8_t opcode2);
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+	bool load(uint8_t CRd, uint8_t adr);
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+	bool store(uint8_t CRd, uint8_t adr);
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+	bool moveCP2ARM(uint32_t *R, uint8_t CRn, uint8_t CRm, uint8_t opcode1, uint8_t opcode2);
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+	bool moveARM2CP(uint32_t val, uint8_t CRn, uint8_t CRm, uint8_t opcode1, uint8_t opcode2);
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+	bool isAccessAllowed(uint32_t address,uint32_t access);
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+};
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-static const uint32_t CP15_ACCESS_WRITE = 0;
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-static const uint32_t CP15_ACCESS_READ = 2;
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-static const uint32_t CP15_ACCESS_EXECUTE = 4;
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-static const uint32_t CP15_ACCESS_WRITEUSR = CP15_ACCESS_WRITE;
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-static const uint32_t CP15_ACCESS_WRITESYS = 1;
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-static const uint32_t CP15_ACCESS_READUSR = CP15_ACCESS_READ;
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-static const uint32_t CP15_ACCESS_READSYS = 3;
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-static const uint32_t CP15_ACCESS_EXECUSR = CP15_ACCESS_EXECUTE;
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-static const uint32_t CP15_ACCESS_EXECSYS = 5;
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+extern armcp15_t cp15;
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+void maskPrecalc();
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 #endif /* __CP15_H__*/
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Import actual code.

Naram Qashat authored on 2013/03/26 02:41:19
Showing 1 changed files
src/in_2sf/desmume/cp15.h
History View file @ bc076aa
1 1 
new file mode 100644
... ... 
@@ -0,0 +1,89 @@
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+/*
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+	Copyright (C) 2006 yopyop
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+	Copyright (C) 2006-2010 DeSmuME team
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+
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+	This file is free software: you can redistribute it and/or modify
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+	it under the terms of the GNU General Public License as published by
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+	the Free Software Foundation, either version 2 of the License, or
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+	(at your option) any later version.
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+
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+	This file is distributed in the hope that it will be useful,
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+	but WITHOUT ANY WARRANTY; without even the implied warranty of
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+	MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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+	GNU General Public License for more details.
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+
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+	You should have received a copy of the GNU General Public License
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+	along with the this software.  If not, see <http://www.gnu.org/licenses/>.
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+*/
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+
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+#ifndef __CP15_H__
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+#define __CP15_H__
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+
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+#include "armcpu.h"
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+
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+struct armcp15_t
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+{
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+	uint32_t IDCode;
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+	uint32_t cacheType;
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+	uint32_t TCMSize;
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+	uint32_t ctrl;
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+	uint32_t DCConfig;
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+	uint32_t ICConfig;
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+	uint32_t writeBuffCtrl;
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+	uint32_t und;
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+	uint32_t DaccessPerm;
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+	uint32_t IaccessPerm;
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+	uint32_t protectBaseSize0;
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+	uint32_t protectBaseSize1;
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+	uint32_t protectBaseSize2;
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+	uint32_t protectBaseSize3;
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+	uint32_t protectBaseSize4;
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+	uint32_t protectBaseSize5;
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+	uint32_t protectBaseSize6;
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+	uint32_t protectBaseSize7;
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+	uint32_t cacheOp;
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+	uint32_t DcacheLock;
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+	uint32_t IcacheLock;
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+	uint32_t ITCMRegion;
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+	uint32_t DTCMRegion;
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+	uint32_t processID;
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+	uint32_t RAM_TAG;
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+	uint32_t testState;
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+	uint32_t cacheDbg;
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+	/* calculated bitmasks for the regions to decide rights uppon */
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+	/* calculation is done in the MCR instead of on mem access for performance */
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+	uint32_t regionWriteMask_USR[8];
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+	uint32_t regionWriteMask_SYS[8];
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+	uint32_t regionReadMask_USR[8];
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+	uint32_t regionReadMask_SYS[8];
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+	uint32_t regionExecuteMask_USR[8];
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+	uint32_t regionExecuteMask_SYS[8];
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+	uint32_t regionWriteSet_USR[8];
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+	uint32_t regionWriteSet_SYS[8];
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+	uint32_t regionReadSet_USR[8];
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+	uint32_t regionReadSet_SYS[8];
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+	uint32_t regionExecuteSet_USR[8];
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+	uint32_t regionExecuteSet_SYS[8];
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+
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+	armcpu_t *cpu;
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+};
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+
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+armcp15_t *armcp15_new(armcpu_t *c);
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+//bool armcp15_dataProcess(armcp15_t *armcp15, uint8_t CRd, uint8_t CRn, uint8_t CRm, uint8_t opcode1, uint8_t opcode2);
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+//bool armcp15_load(armcp15_t *armcp15, uint8_t CRd, uint8_t adr);
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+//bool armcp15_store(armcp15_t *armcp15, uint8_t CRd, uint8_t adr);
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+bool armcp15_moveCP2ARM(armcp15_t *armcp15, uint32_t * R, uint8_t CRn, uint8_t CRm, uint8_t opcode1, uint8_t opcode2);
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+bool armcp15_moveARM2CP(armcp15_t *armcp15, uint32_t val, uint8_t CRn, uint8_t CRm, uint8_t opcode1, uint8_t opcode2);
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+//bool armcp15_isAccessAllowed(armcp15_t *armcp15,uint32_t address,uint32_t access);
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+
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+static const uint32_t CP15_ACCESS_WRITE = 0;
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+static const uint32_t CP15_ACCESS_READ = 2;
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+static const uint32_t CP15_ACCESS_EXECUTE = 4;
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+static const uint32_t CP15_ACCESS_WRITEUSR = CP15_ACCESS_WRITE;
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+static const uint32_t CP15_ACCESS_WRITESYS = 1;
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+static const uint32_t CP15_ACCESS_READUSR = CP15_ACCESS_READ;
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+static const uint32_t CP15_ACCESS_READSYS = 3;
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+static const uint32_t CP15_ACCESS_EXECUSR = CP15_ACCESS_EXECUTE;
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+static const uint32_t CP15_ACCESS_EXECSYS = 5;
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+
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+#endif /* __CP15_H__*/