@@ -1,5 +1,4 @@

-#ifndef GBAINLINE_H

-#define GBAINLINE_H

+#pragma once

 #include "../common/Port.h"

 #include "Sound.h"

@@ -8,8 +7,9 @@ extern const uint32_t objTilesAddress[3];

 extern bool stopState;

 extern bool holdState;

-extern int holdType;

 extern int cpuNextEvent;

+extern bool cpuDmaHack;

+extern uint32_t cpuDmaLast;

 extern bool timer0On;

 extern int timer0Ticks;

 extern int timer0ClockReload;

@@ -24,6 +24,8 @@ extern int timer3Ticks;

 extern int timer3ClockReload;

 extern int cpuTotalTicks;

+inline uint8_t CPUReadByteQuick(uint32_t addr) { return map[addr >> 24].address[addr & map[addr >> 24].mask]; }

+

 inline uint16_t CPUReadHalfWordQuick(uint32_t addr) { return READ16LE(&map[addr >> 24].address[addr & map[addr >> 24].mask]); }

 inline uint32_t CPUReadMemoryQuick(uint32_t addr) { return READ32LE(&map[addr >> 24].address[addr & map[addr >> 24].mask]); }

@@ -42,7 +44,7 @@ inline uint32_t CPUReadMemory(uint32_t address)

 			if (reg[15].I >> 24)

 			{

 				if (address < 0x4000)

-					value = READ32LE(&biosProtected);

+					value = READ32LE(&biosProtected[0]);

 				else

 					goto unreadable;

 			}

@@ -92,45 +94,32 @@ inline uint32_t CPUReadMemory(uint32_t address)

 			break;

 		case 13:

 		case 14:

-			return 0;

+		case 15:

+			value = 0;

+			break;

 		// default

 		default:

 		unreadable:

-			if (armState)

-				return CPUReadMemoryQuick(reg[15].I);

+			if (cpuDmaHack)

+				value = cpuDmaLast;

 			else

-				return CPUReadHalfWordQuick(reg[15].I) | (CPUReadHalfWordQuick(reg[15].I) << 16);

+			{

+				if (armState)

+					return CPUReadMemoryQuick(reg[15].I);

+				else

+					return CPUReadHalfWordQuick(reg[15].I) | CPUReadHalfWordQuick(reg[15].I) << 16;

+			}

 	}

 	if (oldAddress & 3)

 	{

-#ifdef C_CORE

 		int shift = (oldAddress & 3) << 3;

 		value = (value >> shift) | (value << (32 - shift));

-#else

-# ifdef __GNUC__

-		asm("and $3, %%ecx;"

-			"shl $3 ,%%ecx;"

-			"ror %%cl, %0"

-			: "=r" (value)

-			: "r" (value), "c" (oldAddress));

-# else

-		__asm

-		{

-			mov ecx, oldAddress;

-			and ecx, 3;

-			shl ecx, 3;

-			ror [dword ptr value], cl;

-		}

-# endif

-#endif

 	}

 	return value;

 }

-extern uint32_t myROM[];

-

 inline uint32_t CPUReadHalfWord(uint32_t address)

 {

 	uint32_t value;

@@ -174,6 +163,8 @@ inline uint32_t CPUReadHalfWord(uint32_t address)

 						value = 0xFFFF - ((timer3Ticks - cpuTotalTicks) >> timer3ClockReload);

 				}

 			}

+			else if (address < 0x4000400 && ioReadable[address & 0x3fc])

+				value = 0;

 			else

 				goto unreadable;

 			break;

@@ -204,12 +195,24 @@ inline uint32_t CPUReadHalfWord(uint32_t address)

 			else

 				value = READ16LE(&rom[address & 0x1FFFFFE]);

 			break;

+		case 13:

+		case 14:

+		case 15:

+			value = 0;

+			break;

+		// default

 		default:

 		unreadable:

-			if (armState)

-				return CPUReadMemoryQuick(reg[15].I);

+			if (cpuDmaHack)

+				value = cpuDmaLast & 0xFFFF;

 			else

-				return CPUReadHalfWordQuick(reg[15].I) | (CPUReadHalfWordQuick(reg[15].I) << 16);

+			{

+				if (armState)

+					value = CPUReadHalfWordQuick(reg[15].I + (address & 2));

+				else

+					value = CPUReadHalfWordQuick(reg[15].I);

+			}

+			return value;

 	}

 	if (oldAddress & 1)

@@ -220,13 +223,7 @@ inline uint32_t CPUReadHalfWord(uint32_t address)

 inline int16_t CPUReadHalfWordSigned(uint32_t address)

 {

-	uint32_t oldAddress = address;

-	if (address & 1)

-		address &= ~0x01;

-	int16_t value = static_cast<int16_t>(CPUReadHalfWord(address));

-	if (oldAddress & 1)

-		value = static_cast<int8_t>(value);

-	return value;

+	return static_cast<int16_t>(CPUReadHalfWord(address));

 }

 inline uint8_t CPUReadByte(uint32_t address)

@@ -239,7 +236,7 @@ inline uint8_t CPUReadByte(uint32_t address)

 				if (address < 0x4000)

 					return biosProtected[address & 3];

 				else

-					goto unreadable;

+					break;

 			}

 			return bios[address & 0x3FFF];

 		case 2:

@@ -250,7 +247,7 @@ inline uint8_t CPUReadByte(uint32_t address)

 			if (address < 0x4000400 && ioReadable[address & 0x3ff])

 				return ioMem[address & 0x3ff];

 			else

-				goto unreadable;

+				break;

 		case 5:

 			return paletteRAM[address & 0x3ff];

 		case 6:

@@ -268,12 +265,19 @@ inline uint8_t CPUReadByte(uint32_t address)

 		case 11:

 		case 12:

 			return rom[address & 0x1FFFFFF];

-		default:

-		unreadable:

-			if (armState)

-				return CPUReadMemoryQuick(reg[15].I);

-			else

-				return CPUReadHalfWordQuick(reg[15].I) | (CPUReadHalfWordQuick(reg[15].I) << 16);

+		case 13:

+		case 14:

+		case 15:

+			return 0;

+	}

+	if (cpuDmaHack)

+		return cpuDmaLast & 0xFF;

+	else

+	{

+		if (armState)

+			return CPUReadByteQuick(reg[15].I + (address & 3));

+		else

+			return CPUReadByteQuick(reg[15].I + (address & 1));

 	}

 }

@@ -305,6 +309,7 @@ inline void CPUWriteMemory(uint32_t address, uint32_t value)

 				return;

 			if ((address & 0x18000) == 0x18000)

 				address &= 0x17fff;

+

 			WRITE32LE(&vram[address], value);

 			break;

 		case 0x07:

@@ -405,7 +410,6 @@ inline void CPUWriteByte(uint32_t address, uint8_t b)

 						if (b == 0x80)

 							stopState = true;

 						holdState = true;

-						holdType = -1;

 						cpuNextEvent = cpuTotalTicks;

 						break;

 					default: // every other register

@@ -415,7 +419,6 @@ inline void CPUWriteByte(uint32_t address, uint8_t b)

 						else

 							CPUUpdateRegister(lowerBits, (READ16LE(&ioMem[lowerBits]) & 0xFF00) | b);

 				}

-				break;

 			}

 			break;

 		case 5:

@@ -441,5 +444,3 @@ inline void CPUWriteByte(uint32_t address, uint8_t b)

 			break;

 	}

 }

-

-#endif // GBAINLINE_H

@@ -98,8 +98,8 @@ inline uint32_t CPUReadMemory(uint32_t address)

 		unreadable:

 			if (armState)

 				return CPUReadMemoryQuick(reg[15].I);

-			else 

-				return CPUReadHalfWordQuick(reg[15].I) | CPUReadHalfWordQuick(reg[15].I) << 16;

+			else

+				return CPUReadHalfWordQuick(reg[15].I) | (CPUReadHalfWordQuick(reg[15].I) << 16);

 	}

 	if (oldAddress & 3)

@@ -108,13 +108,13 @@ inline uint32_t CPUReadMemory(uint32_t address)

 		int shift = (oldAddress & 3) << 3;

 		value = (value >> shift) | (value << (32 - shift));

 #else

-#ifdef __GNUC__

+# ifdef __GNUC__

 		asm("and $3, %%ecx;"

 			"shl $3 ,%%ecx;"

 			"ror %%cl, %0"

 			: "=r" (value)

 			: "r" (value), "c" (oldAddress));

-#else

+# else

 		__asm

 		{

 			mov ecx, oldAddress;

@@ -122,7 +122,7 @@ inline uint32_t CPUReadMemory(uint32_t address)

 			shl ecx, 3;

 			ror [dword ptr value], cl;

 		}

-#endif

+# endif

 #endif

 	}

@@ -204,16 +204,12 @@ inline uint32_t CPUReadHalfWord(uint32_t address)

 			else

 				value = READ16LE(&rom[address & 0x1FFFFFE]);

 			break;

-		case 13:

-		case 14:

-			return 0;

-		// default

 		default:

 		unreadable:

 			if (armState)

 				return CPUReadMemoryQuick(reg[15].I);

 			else

-				return CPUReadHalfWordQuick(reg[15].I) | CPUReadHalfWordQuick(reg[15].I) << 16;

+				return CPUReadHalfWordQuick(reg[15].I) | (CPUReadHalfWordQuick(reg[15].I) << 16);

 	}

 	if (oldAddress & 1)

@@ -272,16 +268,12 @@ inline uint8_t CPUReadByte(uint32_t address)

 		case 11:

 		case 12:

 			return rom[address & 0x1FFFFFF];

-		case 13:

-		case 14:

-			return 0;

-		// default

 		default:

 		unreadable:

 			if (armState)

 				return CPUReadMemoryQuick(reg[15].I);

 			else

-				return CPUReadHalfWordQuick(reg[15].I) | CPUReadHalfWordQuick(reg[15].I) << 16;

+				return CPUReadHalfWordQuick(reg[15].I) | (CPUReadHalfWordQuick(reg[15].I) << 16);

 	}

 }

@@ -1,13 +1,8 @@

 #ifndef GBAINLINE_H

 #define GBAINLINE_H

-//#include "../System.h"

 #include "../common/Port.h"

-//#include "RTC.h"

 #include "Sound.h"

-//#include "agbprint.h"

-#include "GBAcpu.h"

-//#include "GBALink.h"

 extern const uint32_t objTilesAddress[3];

@@ -15,11 +10,6 @@ extern bool stopState;

 extern bool holdState;

 extern int holdType;

 extern int cpuNextEvent;

-extern bool cpuSramEnabled;

-extern bool cpuFlashEnabled;

-extern bool cpuEEPROMEnabled;

-extern bool cpuEEPROMSensorEnabled;

-extern uint32_t cpuDmaLast;

 extern bool timer0On;

 extern int timer0Ticks;

 extern int timer0ClockReload;

@@ -34,702 +24,430 @@ extern int timer3Ticks;

 extern int timer3ClockReload;

 extern int cpuTotalTicks;

-#define CPUReadByteQuick(addr) \

-  map[(addr)>>24].address[(addr) & map[(addr)>>24].mask]

+inline uint16_t CPUReadHalfWordQuick(uint32_t addr) { return READ16LE(&map[addr >> 24].address[addr & map[addr >> 24].mask]); }

-#define CPUReadHalfWordQuick(addr) \

-  READ16LE(((uint16_t*)&map[(addr)>>24].address[(addr) & map[(addr)>>24].mask]))

+inline uint32_t CPUReadMemoryQuick(uint32_t addr) { return READ32LE(&map[addr >> 24].address[addr & map[addr >> 24].mask]); }

-#define CPUReadMemoryQuick(addr) \

-  READ32LE(((uint32_t*)&map[(addr)>>24].address[(addr) & map[(addr)>>24].mask]))

-

-static inline uint32_t CPUReadMemory(uint32_t address)

+inline uint32_t CPUReadMemory(uint32_t address)

 {

-  uint32_t value;

-  uint32_t oldAddress = address;

-

-  if(address & 3) {

-           address &= ~0x03;

-  }

-

-  switch(address >> 24) {

-  case 0:

-    if(reg[15].I >> 24) {

-      if(address < 0x4000) {

-#ifdef GBA_LOGGING

-        if(systemVerbose & VERBOSE_ILLEGAL_READ) {

-          log("Illegal word read from bios: %08x at %08x\n", address, armMode ?

-            armNextPC - 4 : armNextPC - 2);

-        }

-#endif

-

-        value = READ32LE(((uint32_t *)&biosProtected));

-      }

-      else goto unreadable;

-    } else

-      value = READ32LE(((uint32_t *)&bios[address & 0x3FFC]));

-    break;

-  case 2:

-    value = READ32LE(((uint32_t *)&workRAM[address & 0x3FFFC]));

-    break;

-  case 3:

-    value = READ32LE(((uint32_t *)&internalRAM[address & 0x7ffC]));

-    break;

-  case 4:

-	  if((address < 0x4000400) && ioReadable[address & 0x3fc]) {

-		  if(ioReadable[(address & 0x3fc) + 2]) {

-			  value = READ32LE(((uint32_t *)&ioMem[address & 0x3fC]));

-			  /*if ((address & 0x3fc) == COMM_JOY_RECV_L)

-				  UPDATE_REG(COMM_JOYSTAT, READ16LE(&ioMem[COMM_JOYSTAT]) & ~JOYSTAT_RECV);*/

-		  } else {

-			  value = READ16LE(((uint16_t *)&ioMem[address & 0x3fc]));

-		  }

-	  }

-	  else

-		  goto unreadable;

-	  break;

-  case 5:

-    value = READ32LE(((uint32_t *)&paletteRAM[address & 0x3fC]));

-    break;

-  case 6:

-    address = (address & 0x1fffc);

-    if (((DISPCNT & 7) >2) && ((address & 0x1C000) == 0x18000))

-    {

-      value = 0;

-      break;

-    }

-    if ((address & 0x18000) == 0x18000)

-      address &= 0x17fff;

-    value = READ32LE(((uint32_t *)&vram[address]));

-    break;

-  case 7:

-    value = READ32LE(((uint32_t *)&oam[address & 0x3FC]));

-    break;

-  case 8:

-  case 9:

-  case 10:

-  case 11:

-  case 12:

-    value = READ32LE(((uint32_t *)&rom[address&0x1FFFFFC]));

-    break;

-  case 13:

-    if(cpuEEPROMEnabled)

-      // no need to swap this

-      return /*eepromRead(address)*/0;

-    goto unreadable;

-  case 14:

-    if(cpuFlashEnabled | cpuSramEnabled)

-      // no need to swap this

-      return /*flashRead(address)*/0;

-    // default

-  default:

-unreadable:

-#ifdef GBA_LOGGING

-    if(systemVerbose & VERBOSE_ILLEGAL_READ) {

-      log("Illegal word read: %08x at %08x\n", address, armMode ?

-        armNextPC - 4 : armNextPC - 2);

-    }

-#endif

-

-      if(armState) {

-                return CPUReadMemoryQuick(reg[15].I);

-      } else {

-                return CPUReadHalfWordQuick(reg[15].I) |

-          CPUReadHalfWordQuick(reg[15].I) << 16;

-      }

-    }

-

-  if(oldAddress & 3) {

+	uint32_t value;

+	uint32_t oldAddress = address;

+

+	if (address & 3)

+		address &= ~0x03;

+

+	switch (address >> 24)

+	{

+		case 0:

+			if (reg[15].I >> 24)

+			{

+				if (address < 0x4000)

+					value = READ32LE(&biosProtected);

+				else

+					goto unreadable;

+			}

+			else

+				value = READ32LE(&bios[address & 0x3FFC]);

+			break;

+		case 2:

+			value = READ32LE(&workRAM[address & 0x3FFFC]);

+			break;

+		case 3:

+			value = READ32LE(&internalRAM[address & 0x7ffC]);

+			break;

+		case 4:

+			if (address < 0x4000400 && ioReadable[address & 0x3fc])

+			{

+				if (ioReadable[(address & 0x3fc) + 2])

+					value = READ32LE(&ioMem[address & 0x3fC]);

+				else

+					value = READ16LE(&ioMem[address & 0x3fc]);

+			}

+			else

+				goto unreadable;

+			break;

+		case 5:

+			value = READ32LE(&paletteRAM[address & 0x3fC]);

+			break;

+		case 6:

+			address &= 0x1fffc;

+			if ((DISPCNT & 7) > 2 && (address & 0x1C000) == 0x18000)

+			{

+				value = 0;

+				break;

+			}

+			if ((address & 0x18000) == 0x18000)

+				address &= 0x17fff;

+			value = READ32LE(&vram[address]);

+			break;

+		case 7:

+			value = READ32LE(&oam[address & 0x3FC]);

+			break;

+		case 8:

+		case 9:

+		case 10:

+		case 11:

+		case 12:

+			value = READ32LE(&rom[address & 0x1FFFFFC]);

+			break;

+		case 13:

+		case 14:

+			return 0;

+		// default

+		default:

+		unreadable:

+			if (armState)

+				return CPUReadMemoryQuick(reg[15].I);

+			else 

+				return CPUReadHalfWordQuick(reg[15].I) | CPUReadHalfWordQuick(reg[15].I) << 16;

+	}

+

+	if (oldAddress & 3)

+	{

 #ifdef C_CORE

-        int shift = (oldAddress & 3) << 3;

-    value = (value >> shift) | (value << (32 - shift));

+		int shift = (oldAddress & 3) << 3;

+		value = (value >> shift) | (value << (32 - shift));

 #else

 #ifdef __GNUC__

-    asm("and $3, %%ecx;"

-      "shl $3 ,%%ecx;"

-      "ror %%cl, %0"

-      : "=r" (value)

-      : "r" (value), "c" (oldAddress));

+		asm("and $3, %%ecx;"

+			"shl $3 ,%%ecx;"

+			"ror %%cl, %0"

+			: "=r" (value)

+			: "r" (value), "c" (oldAddress));

 #else

-    __asm {

-      mov ecx, oldAddress;

-      and ecx, 3;

-      shl ecx, 3;

-      ror [dword ptr value], cl;

-    }

+		__asm

+		{

+			mov ecx, oldAddress;

+			and ecx, 3;

+			shl ecx, 3;

+			ror [dword ptr value], cl;

+		}

 #endif

 #endif

-  }

+	}

-#ifdef GBA_LOGGING

-  if(oldAddress & 3) {

-          if(systemVerbose & VERBOSE_UNALIGNED_MEMORY) {

-                  log("Unaligned word read from: %08x at %08x (%08x)\n", oldAddress, armMode ?

-                          armNextPC - 4 : armNextPC - 2, value);

-          }

-  }

-#endif

-  return value;

+	return value;

 }

 extern uint32_t myROM[];

-static inline uint32_t CPUReadHalfWord(uint32_t address)

+inline uint32_t CPUReadHalfWord(uint32_t address)

 {

-  uint32_t value;

-  uint32_t oldAddress = address;

-

-  if(address & 1) {

-          address &= ~0x01;

-  }

-

-  switch(address >> 24) {

-  case 0:

-    if (reg[15].I >> 24) {

-      if(address < 0x4000) {

-#ifdef GBA_LOGGING

-        if(systemVerbose & VERBOSE_ILLEGAL_READ) {

-          log("Illegal halfword read from bios: %08x at %08x\n", oldAddress, armMode ?

-            armNextPC - 4 : armNextPC - 2);

-        }

-#endif

-        value = READ16LE(((uint16_t *)&biosProtected[address&2]));

-      } else goto unreadable;

-    } else

-      value = READ16LE(((uint16_t *)&bios[address & 0x3FFE]));

-    break;

-  case 2:

-    value = READ16LE(((uint16_t *)&workRAM[address & 0x3FFFE]));

-    break;

-  case 3:

-    value = READ16LE(((uint16_t *)&internalRAM[address & 0x7ffe]));

-    break;

-  case 4:

-    if((address < 0x4000400) && ioReadable[address & 0x3fe])

-    {

-      value =  READ16LE(((uint16_t *)&ioMem[address & 0x3fe]));

-      if (((address & 0x3fe)>0xFF) && ((address & 0x3fe)<0x10E))

-      {

-        if (((address & 0x3fe) == 0x100) && timer0On)

-          value = 0xFFFF - ((timer0Ticks-cpuTotalTicks) >> timer0ClockReload);

-        else

-          if (((address & 0x3fe) == 0x104) && timer1On && !(TM1CNT & 4))

-            value = 0xFFFF - ((timer1Ticks-cpuTotalTicks) >> timer1ClockReload);

-          else

-            if (((address & 0x3fe) == 0x108) && timer2On && !(TM2CNT & 4))

-              value = 0xFFFF - ((timer2Ticks-cpuTotalTicks) >> timer2ClockReload);

-            else

-              if (((address & 0x3fe) == 0x10C) && timer3On && !(TM3CNT & 4))

-                value = 0xFFFF - ((timer3Ticks-cpuTotalTicks) >> timer3ClockReload);

-      }

-    }

-    else goto unreadable;

-    break;

-  case 5:

-    value = READ16LE(((uint16_t *)&paletteRAM[address & 0x3fe]));

-    break;

-  case 6:

-    address = (address & 0x1fffe);

-    if (((DISPCNT & 7) >2) && ((address & 0x1C000) == 0x18000))

-    {

-      value = 0;

-      break;

-    }

-    if ((address & 0x18000) == 0x18000)

-      address &= 0x17fff;

-    value = READ16LE(((uint16_t *)&vram[address]));

-    break;

-  case 7:

-    value = READ16LE(((uint16_t *)&oam[address & 0x3fe]));

-    break;

-  case 8:

-  case 9:

-  case 10:

-  case 11:

-  case 12:

-    if(address == 0x80000c4 || address == 0x80000c6 || address == 0x80000c8)

-      value = /*rtcRead(address)*/0;

-    else

-      value = READ16LE(((uint16_t *)&rom[address & 0x1FFFFFE]));

-    break;

-  case 13:

-    if(cpuEEPROMEnabled)

-      // no need to swap this

-      return /*eepromRead(address)*/0;

-    goto unreadable;

-  case 14:

-    if(cpuFlashEnabled | cpuSramEnabled)

-      // no need to swap this

-      return /*flashRead(address)*/0;

-    // default

-  default:

-unreadable:

-#ifdef GBA_LOGGING

-    if(systemVerbose & VERBOSE_ILLEGAL_READ) {

-      log("Illegal halfword read: %08x at %08x\n", oldAddress, armMode ?

-        armNextPC - 4 : armNextPC - 2);

-    }

-#endif

-      if(armState) {

-                return CPUReadMemoryQuick(reg[15].I);

-      } else {

-                return CPUReadHalfWordQuick(reg[15].I) |

-                                CPUReadHalfWordQuick(reg[15].I) << 16;

-      }

-    }

-

-  if(oldAddress & 1) {

-    value = (value >> 8) | (value << 24);

-#ifdef GBA_LOGGING

-          if(systemVerbose & VERBOSE_UNALIGNED_MEMORY) {

-                  log("Unaligned halfword read from: %08x at %08x (%08x)\n", oldAddress, armMode ?

-                          armNextPC - 4 : armNextPC - 2, value);

-          }

-#endif

-  }

-

-  return value;

+	uint32_t value;

+	uint32_t oldAddress = address;

+

+	if (address & 1)

+		address &= ~0x01;

+

+	switch (address >> 24)

+	{

+		case 0:

+			if (reg[15].I >> 24)

+			{

+				if (address < 0x4000)

+					value = READ16LE(&biosProtected[address & 2]);

+				else

+					goto unreadable;

+			}

+			else

+				value = READ16LE(&bios[address & 0x3FFE]);

+			break;

+		case 2:

+			value = READ16LE(&workRAM[address & 0x3FFFE]);

+			break;

+		case 3:

+			value = READ16LE(&internalRAM[address & 0x7ffe]);

+			break;

+		case 4:

+			if (address < 0x4000400 && ioReadable[address & 0x3fe])

+			{

+				value = READ16LE(&ioMem[address & 0x3fe]);

+				if ((address & 0x3fe) > 0xFF && (address & 0x3fe) < 0x10E)

+				{

+					if ((address & 0x3fe) == 0x100 && timer0On)

+						value = 0xFFFF - ((timer0Ticks - cpuTotalTicks) >> timer0ClockReload);

+					else if ((address & 0x3fe) == 0x104 && timer1On && !(TM1CNT & 4))

+						value = 0xFFFF - ((timer1Ticks - cpuTotalTicks) >> timer1ClockReload);

+					else if ((address & 0x3fe) == 0x108 && timer2On && !(TM2CNT & 4))

+						value = 0xFFFF - ((timer2Ticks - cpuTotalTicks) >> timer2ClockReload);

+					else if ((address & 0x3fe) == 0x10C && timer3On && !(TM3CNT & 4))

+						value = 0xFFFF - ((timer3Ticks - cpuTotalTicks) >> timer3ClockReload);

+				}

+			}

+			else

+				goto unreadable;

+			break;

+		case 5:

+			value = READ16LE(&paletteRAM[address & 0x3fe]);

+			break;

+		case 6:

+			address &= 0x1fffe;

+			if ((DISPCNT & 7) > 2 && (address & 0x1C000) == 0x18000)

+			{

+				value = 0;

+				break;

+			}

+			if ((address & 0x18000) == 0x18000)

+				address &= 0x17fff;

+			value = READ16LE(&vram[address]);

+			break;

+		case 7:

+			value = READ16LE(&oam[address & 0x3fe]);

+			break;

+		case 8:

+		case 9:

+		case 10:

+		case 11:

+		case 12:

+			if (address == 0x80000c4 || address == 0x80000c6 || address == 0x80000c8)

+				value = 0;

+			else

+				value = READ16LE(&rom[address & 0x1FFFFFE]);

+			break;

+		case 13:

+		case 14:

+			return 0;

+		// default

+		default:

+		unreadable:

+			if (armState)

+				return CPUReadMemoryQuick(reg[15].I);

+			else

+				return CPUReadHalfWordQuick(reg[15].I) | CPUReadHalfWordQuick(reg[15].I) << 16;

+	}

+

+	if (oldAddress & 1)

+		value = (value >> 8) | (value << 24);

+

+	return value;

 }

-static inline int16_t CPUReadHalfWordSigned(uint32_t address)

+inline int16_t CPUReadHalfWordSigned(uint32_t address)

 {

-  uint32_t oldAddress = address;

-  if(address & 1) {

-    address &= ~0x01;

-  }

-  int16_t value = (int16_t)CPUReadHalfWord(address);

-  if((oldAddress & 1))

-  {

-    value = (int8_t)value;

-#ifdef GBA_LOGGING

-        if(systemVerbose & VERBOSE_UNALIGNED_MEMORY) {

-                log("Unaligned signed halfword read from: %08x at %08x (%08x)\n", oldAddress, armMode ?

-                        armNextPC - 4 : armNextPC - 2, value);

-        }

-#endif

-  }

-  return value;

+	uint32_t oldAddress = address;

+	if (address & 1)

+		address &= ~0x01;

+	int16_t value = static_cast<int16_t>(CPUReadHalfWord(address));

+	if (oldAddress & 1)

+		value = static_cast<int8_t>(value);

+	return value;

 }

-static inline uint8_t CPUReadByte(uint32_t address)

+inline uint8_t CPUReadByte(uint32_t address)

 {

-  switch(address >> 24) {

-  case 0:

-    if (reg[15].I >> 24) {

-      if(address < 0x4000) {

-#ifdef GBA_LOGGING

-        if(systemVerbose & VERBOSE_ILLEGAL_READ) {

-          log("Illegal byte read from bios: %08x at %08x\n", address, armMode ?

-            armNextPC - 4 : armNextPC - 2);

-        }

-#endif

-        return biosProtected[address & 3];

-      } else goto unreadable;

-    }

-    return bios[address & 0x3FFF];

-  case 2:

-    return workRAM[address & 0x3FFFF];

-  case 3:

-    return internalRAM[address & 0x7fff];

-  case 4:

-    if((address < 0x4000400) && ioReadable[address & 0x3ff])

-      return ioMem[address & 0x3ff];

-    else goto unreadable;

-  case 5:

-    return paletteRAM[address & 0x3ff];

-  case 6:

-    address = (address & 0x1ffff);

-    if (((DISPCNT & 7) >2) && ((address & 0x1C000) == 0x18000))

-      return 0;

-    if ((address & 0x18000) == 0x18000)

-      address &= 0x17fff;

-    return vram[address];

-  case 7:

-    return oam[address & 0x3ff];

-  case 8:

-  case 9:

-  case 10:

-  case 11:

-  case 12:

-    return rom[address & 0x1FFFFFF];

-  case 13:

-    if(cpuEEPROMEnabled)

-      return /*eepromRead(address)*/0;

-    goto unreadable;

-  case 14:

-    if(cpuSramEnabled | cpuFlashEnabled)

-      return /*flashRead(address)*/0;

-    if(cpuEEPROMSensorEnabled) {

-      switch(address & 0x00008f00) {

-  case 0x8200:

-    return /*systemGetSensorX() & 255*/0;

-  case 0x8300:

-    return /*(systemGetSensorX() >> 8)|0x80*/0;

-  case 0x8400:

-    return /*systemGetSensorY() & 255*/0;

-  case 0x8500:

-    return /*systemGetSensorY() >> 8*/0;

-      }

-    }

-    // default

-  default:

-unreadable:

-#ifdef GBA_LOGGING

-    if(systemVerbose & VERBOSE_ILLEGAL_READ) {

-      log("Illegal byte read: %08x at %08x\n", address, armMode ?

-        armNextPC - 4 : armNextPC - 2);

-    }

-#endif

-      if(armState) {

-                         return CPUReadMemoryQuick(reg[15].I);

-      } else {

-                         return CPUReadHalfWordQuick(reg[15].I) |

-                                 CPUReadHalfWordQuick(reg[15].I) << 16;

-      }

-    }

+	switch (address >> 24)

+	{

+		case 0:

+			if (reg[15].I >> 24)

+			{

+				if (address < 0x4000)

+					return biosProtected[address & 3];

+				else

+					goto unreadable;

+			}

+			return bios[address & 0x3FFF];

+		case 2:

+			return workRAM[address & 0x3FFFF];

+		case 3:

+			return internalRAM[address & 0x7fff];

+		case 4:

+			if (address < 0x4000400 && ioReadable[address & 0x3ff])

+				return ioMem[address & 0x3ff];

+			else

+				goto unreadable;