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[2SF] Minor template removal.

Naram Qashat authored on 2014/09/08 13:53:30
Showing 3 changed files
src/in_2sf/desmume/MMU.cpp
History View file @ 7c32cf3
... ... 
@@ -214,7 +214,7 @@ static const uint32_t ARM7_HACKY_SIWRAM_LOCATION = 0x03000000;
214 214 
 // NOTE - this whole approach is probably fundamentally wrong.
215 215 
 // according to dasShiny research, its possible to map multiple banks to the same addresses. something more sophisticated would be needed.
216 216 
 // however, it hasnt proven necessary yet for any known test case.
217 
-template<int PROCNUM> static inline uint32_t MMU_LCDmap(uint32_t addr, bool &unmapped, bool &restricted)
217 
+static inline uint32_t MMU_LCDmap(int PROCNUM, uint32_t addr, bool &unmapped, bool &restricted)
218 218 
 {
219 219 
 	unmapped = false;
220 220 
 	restricted = false; // this will track whether 8bit writes are allowed
... ... 
@@ -988,7 +988,7 @@ uint16_t DSI_TSC::read16()
988 988
989 989 
 // TODO:
990 990 
 // NAND flash support (used in Made in Ore/WarioWare D.I.Y.)
991 
-template<int PROCNUM> void FASTCALL MMU_writeToGCControl(uint32_t val)
991 
+void FASTCALL MMU_writeToGCControl(int PROCNUM, uint32_t val)
992 992 
 {
993 993 
 	int TEST_PROCNUM = PROCNUM;
994 994 
 	nds_dscard &card = MMU.dscard[TEST_PROCNUM];
... ... 
@@ -1069,7 +1069,7 @@ template<int PROCNUM> void FASTCALL MMU_writeToGCControl(uint32_t val)
1069 1069 
 	triggerDma(EDMAMode_Card);
1070 1070 
 }
1071 1071
1072 
-template<int PROCNUM> uint32_t MMU_readFromGC()
1072 
+uint32_t MMU_readFromGC(int PROCNUM)
1073 1073 
 {
1074 1074 
 	int TEST_PROCNUM = PROCNUM;
1075 1075
... ... 
@@ -1109,7 +1109,7 @@ template<int PROCNUM> uint32_t MMU_readFromGC()
1109 1109 
 	return val;
1110 1110 
 }
1111 1111
1112 
-template<int PROCNUM> static void REG_IF_WriteByte(uint32_t addr, uint8_t val)
1112 
+static void REG_IF_WriteByte(int PROCNUM, uint32_t addr, uint8_t val)
1113 1113 
 {
1114 1114 
 	// the following bits are generated from logic and should not be affected here
1115 1115 
 	// Bit 21    NDS9 only: Geometry Command FIFO
... ... 
@@ -1132,18 +1132,18 @@ template<int PROCNUM> static void REG_IF_WriteByte(uint32_t addr, uint8_t val)
1132 1132 
 	NDS_Reschedule();
1133 1133 
 }
1134 1134
1135 
-template<int PROCNUM> static void REG_IF_WriteWord(uint32_t addr, uint16_t val)
1135 
+static void REG_IF_WriteWord(int PROCNUM, uint32_t addr, uint16_t val)
1136 1136 
 {
1137 
-	REG_IF_WriteByte<PROCNUM>(addr, val & 0xFF);
1138 
-	REG_IF_WriteByte<PROCNUM>(addr + 1, (val >> 8) & 0xFF);
1137 
+	REG_IF_WriteByte(PROCNUM, addr, val & 0xFF);
1138 
+	REG_IF_WriteByte(PROCNUM, addr + 1, (val >> 8) & 0xFF);
1139 1139 
 }
1140 1140
1141 
-template<int PROCNUM> static void REG_IF_WriteLong(uint32_t val)
1141 
+static void REG_IF_WriteLong(int PROCNUM, uint32_t val)
1142 1142 
 {
1143 
-	REG_IF_WriteByte<PROCNUM>(0, val & 0xFF);
1144 
-	REG_IF_WriteByte<PROCNUM>(1, (val >> 8) & 0xFF);
1145 
-	REG_IF_WriteByte<PROCNUM>(2, (val >> 16) & 0xFF);
1146 
-	REG_IF_WriteByte<PROCNUM>(3, (val >> 24) & 0xFF);
1143 
+	REG_IF_WriteByte(PROCNUM, 0, val & 0xFF);
1144 
+	REG_IF_WriteByte(PROCNUM, 1, (val >> 8) & 0xFF);
1145 
+	REG_IF_WriteByte(PROCNUM, 2, (val >> 16) & 0xFF);
1146 
+	REG_IF_WriteByte(PROCNUM, 3, (val >> 24) & 0xFF);
1147 1147 
 }
1148 1148
1149 1149 
 template<int PROCNUM> uint32_t MMU_struct::gen_IF()
... ... 
@@ -1650,16 +1650,16 @@ void FASTCALL _MMU_ARM9_write08(uint32_t adr, uint8_t val)
1650 1650 
 #endif
1651 1651
1652 1652 
 			case REG_IF:
1653 
-				REG_IF_WriteByte<ARMCPU_ARM9>(0, val);
1653 
+				REG_IF_WriteByte(ARMCPU_ARM9, 0, val);
1654 1654 
 				break;
1655 1655 
 			case REG_IF + 1:
1656 
-				REG_IF_WriteByte<ARMCPU_ARM9>(1, val);
1656 
+				REG_IF_WriteByte(ARMCPU_ARM9, 1, val);
1657 1657 
 				break;
1658 1658 
 			case REG_IF + 2:
1659 
-				REG_IF_WriteByte<ARMCPU_ARM9>(2, val);
1659 
+				REG_IF_WriteByte(ARMCPU_ARM9, 2, val);
1660 1660 
 				break;
1661 1661 
 			case REG_IF + 3:
1662 
-				REG_IF_WriteByte<ARMCPU_ARM9>(3, val);
1662 
+				REG_IF_WriteByte(ARMCPU_ARM9, 3, val);
1663 1663 
 				break;
1664 1664
1665 1665 
 			case REG_VRAMCNTA:
... ... 
@@ -1779,10 +1779,11 @@ void FASTCALL _MMU_ARM9_write16(uint32_t adr, uint16_t val)
1779 1779 
 				MMU.reg_IE[ARMCPU_ARM9] = (MMU.reg_IE[ARMCPU_ARM9] & 0xFFFF) | (val << 16);
1780 1780 
 				return;
1781 1781 
 			case REG_IF:
1782 
-				REG_IF_WriteWord<ARMCPU_ARM9>(0, val);
1782 
+				REG_IF_WriteWord(ARMCPU_ARM9, 0, val);
1783 
+				return;
1784 
+			case REG_IF + 2:
1785 
+				REG_IF_WriteWord(ARMCPU_ARM9, 2, val);
1783 1786 
 				return;
1784 
-			case REG_IF+2:
1785 
-				REG_IF_WriteWord<ARMCPU_ARM9>(2, val); return;
1786 1787
1787 1788 
 			case REG_IPCSYNC:
1788 1789 
 				MMU_IPCSync(ARMCPU_ARM9, val);
... ... 
@@ -1808,10 +1809,10 @@ void FASTCALL _MMU_ARM9_write16(uint32_t adr, uint16_t val)
1808 1809 
 			}
1809 1810
1810 1811 
 			case REG_GCROMCTRL:
1811 
-				MMU_writeToGCControl<ARMCPU_ARM9>((T1ReadLong(MMU.MMU_MEM[ARMCPU_ARM9][0x40], 0x1A4) & 0xFFFF0000) | val);
1812 
+				MMU_writeToGCControl(ARMCPU_ARM9, (T1ReadLong(MMU.MMU_MEM[ARMCPU_ARM9][0x40], 0x1A4) & 0xFFFF0000) | val);
1812 1813 
 				return;
1813 1814 
 			case REG_GCROMCTRL + 2:
1814 
-				MMU_writeToGCControl<ARMCPU_ARM9>((T1ReadLong(MMU.MMU_MEM[ARMCPU_ARM9][0x40], 0x1A4) & 0xFFFF) | (val << 16));
1815 
+				MMU_writeToGCControl(ARMCPU_ARM9, (T1ReadLong(MMU.MMU_MEM[ARMCPU_ARM9][0x40], 0x1A4) & 0xFFFF) | (val << 16));
1815 1816 
 				return;
1816 1817 
 		}
1817 1818
... ... 
@@ -1820,7 +1821,7 @@ void FASTCALL _MMU_ARM9_write16(uint32_t adr, uint16_t val)
1820 1821 
 	}
1821 1822
1822 1823 
 	bool unmapped, restricted;
1823 
-	adr = MMU_LCDmap<ARMCPU_ARM9>(adr, unmapped, restricted);
1824 
+	adr = MMU_LCDmap(ARMCPU_ARM9, adr, unmapped, restricted);
1824 1825 
 	if (unmapped)
1825 1826 
 		return;
1826 1827
... ... 
@@ -1892,7 +1893,7 @@ void FASTCALL _MMU_ARM9_write32(uint32_t adr, uint32_t val)
1892 1893 
 				return;
1893 1894
1894 1895 
 			case REG_IF:
1895 
-				REG_IF_WriteLong<ARMCPU_ARM9>(val);
1896 
+				REG_IF_WriteLong(ARMCPU_ARM9, val);
1896 1897 
 				return;
1897 1898
1898 1899 
 			case REG_TM0CNTL:
... ... 
@@ -1953,7 +1954,7 @@ void FASTCALL _MMU_ARM9_write32(uint32_t adr, uint32_t val)
1953 1954 
 				return;
1954 1955
1955 1956 
 			case REG_GCROMCTRL:
1956 
-				MMU_writeToGCControl<ARMCPU_ARM9>(val);
1957 
+				MMU_writeToGCControl(ARMCPU_ARM9, val);
1957 1958 
 				return;
1958 1959 
 			case REG_DISPA_DISPCAPCNT:
1959 1960 
 				T1WriteLong(MMU.ARM9_REG, 0x64, val);
... ... 
@@ -1969,7 +1970,7 @@ void FASTCALL _MMU_ARM9_write32(uint32_t adr, uint32_t val)
1969 1970 
 	}
1970 1971
1971 1972 
 	bool unmapped, restricted;
1972 
-	adr = MMU_LCDmap<ARMCPU_ARM9>(adr, unmapped, restricted);
1973 
+	adr = MMU_LCDmap(ARMCPU_ARM9, adr, unmapped, restricted);
1973 1974 
 	if (unmapped)
1974 1975 
 		return;
1975 1976
... ... 
@@ -2047,7 +2048,7 @@ uint8_t FASTCALL _MMU_ARM9_read08(uint32_t adr)
2047 2048 
 	}
2048 2049
2049 2050 
 	bool unmapped, restricted;
2050 
-	adr = MMU_LCDmap<ARMCPU_ARM9>(adr, unmapped, restricted);
2051 
+	adr = MMU_LCDmap(ARMCPU_ARM9, adr, unmapped, restricted);
2051 2052 
 	if (unmapped)
2052 2053 
 		return 0;
2053 2054
... ... 
@@ -2181,7 +2182,7 @@ uint32_t FASTCALL _MMU_ARM9_read32(uint32_t adr)
2181 2182 
 			}
2182 2183
2183 2184 
 			case REG_GCDATAIN:
2184 
-				return MMU_readFromGC<ARMCPU_ARM9>();
2185 
+				return MMU_readFromGC(ARMCPU_ARM9);
2185 2186 
 		}
2186 2187 
 		return T1ReadLong_guaranteedAligned(MMU.MMU_MEM[ARMCPU_ARM9][adr >> 20], adr & MMU.MMU_MASK[ARMCPU_ARM9][adr >> 20]);
2187 2188 
 	}
... ... 
@@ -2227,16 +2228,16 @@ void FASTCALL _MMU_ARM7_write08(uint32_t adr, uint8_t val)
2227 2228 
 		switch (adr)
2228 2229 
 		{
2229 2230 
 			case REG_IF:
2230 
-				REG_IF_WriteByte<ARMCPU_ARM7>(0, val);
2231 
+				REG_IF_WriteByte(ARMCPU_ARM7, 0, val);
2231 2232 
 				break;
2232 2233 
 			case REG_IF + 1:
2233 
-				REG_IF_WriteByte<ARMCPU_ARM7>(1, val);
2234 
+				REG_IF_WriteByte(ARMCPU_ARM7, 1, val);
2234 2235 
 				break;
2235 2236 
 			case REG_IF + 2:
2236 
-				REG_IF_WriteByte<ARMCPU_ARM7>(2, val);
2237 
+				REG_IF_WriteByte(ARMCPU_ARM7, 2, val);
2237 2238 
 				break;
2238 2239 
 			case REG_IF + 3:
2239 
-				REG_IF_WriteByte<ARMCPU_ARM7>(3, val);
2240 
+				REG_IF_WriteByte(ARMCPU_ARM7, 3, val);
2240 2241 
 				break;
2241 2242
2242 2243 
 			case REG_POSTFLG:
... ... 
@@ -2530,10 +2531,10 @@ void FASTCALL _MMU_ARM7_write16(uint32_t adr, uint16_t val)
2530 2531 
 				return;
2531 2532
2532 2533 
 			case REG_IF:
2533 
-				REG_IF_WriteWord<ARMCPU_ARM7>(0, val);
2534 
+				REG_IF_WriteWord(ARMCPU_ARM7, 0, val);
2534 2535 
 				return;
2535 2536 
 			case REG_IF + 2:
2536 
-				REG_IF_WriteWord<ARMCPU_ARM7>(2, val);
2537 
+				REG_IF_WriteWord(ARMCPU_ARM7, 2, val);
2537 2538 
 				return;
2538 2539
2539 2540 
 			case REG_IPCSYNC:
... ... 
@@ -2560,10 +2561,10 @@ void FASTCALL _MMU_ARM7_write16(uint32_t adr, uint16_t val)
2560 2561 
 			}
2561 2562
2562 2563 
 			case REG_GCROMCTRL:
2563 
-				MMU_writeToGCControl<ARMCPU_ARM7>((T1ReadLong(MMU.MMU_MEM[ARMCPU_ARM7][0x40], 0x1A4) & 0xFFFF0000) | val);
2564 
+				MMU_writeToGCControl(ARMCPU_ARM7, (T1ReadLong(MMU.MMU_MEM[ARMCPU_ARM7][0x40], 0x1A4) & 0xFFFF0000) | val);
2564 2565 
 				return;
2565 2566 
 			case REG_GCROMCTRL + 2:
2566 
-				MMU_writeToGCControl<ARMCPU_ARM7>((T1ReadLong(MMU.MMU_MEM[ARMCPU_ARM7][0x40], 0x1A4) & 0xFFFF) | (val << 16));
2567 
+				MMU_writeToGCControl(ARMCPU_ARM7, (T1ReadLong(MMU.MMU_MEM[ARMCPU_ARM7][0x40], 0x1A4) & 0xFFFF) | (val << 16));
2567 2568 
 				return;
2568 2569 
 		}
2569 2570
... ... 
@@ -2619,7 +2620,7 @@ void FASTCALL _MMU_ARM7_write32(uint32_t adr, uint32_t val)
2619 2620 
 				return;
2620 2621
2621 2622 
 			case REG_IF:
2622 
-				REG_IF_WriteLong<ARMCPU_ARM7>(val);
2623 
+				REG_IF_WriteLong(ARMCPU_ARM7, val);
2623 2624 
 				return;
2624 2625
2625 2626 
 			case REG_TM0CNTL:
... ... 
@@ -2645,7 +2646,7 @@ void FASTCALL _MMU_ARM7_write32(uint32_t adr, uint32_t val)
2645 2646 
 				return;
2646 2647
2647 2648 
 			case REG_GCROMCTRL:
2648 
-				MMU_writeToGCControl<ARMCPU_ARM7>(val);
2649 
+				MMU_writeToGCControl(ARMCPU_ARM7, val);
2649 2650 
 				return;
2650 2651
2651 2652 
 			case REG_GCDATAIN:
... ... 
@@ -2818,7 +2819,7 @@ uint32_t FASTCALL _MMU_ARM7_read32(uint32_t adr)
2818 2819 
 			case REG_GCROMCTRL:
2819 2820 
 				break;
2820 2821 
 			case REG_GCDATAIN:
2821 
-				return MMU_readFromGC<ARMCPU_ARM7>();
2822 
+				return MMU_readFromGC(ARMCPU_ARM7);
2822 2823
2823 2824 
 			case REG_VRAMSTAT:
2824 2825 
 				// make sure WRAMSTAT is stashed and then fallthrough return the value from memory. i know, gross.
src/in_2sf/desmume/SPU.cpp
History View file @ 7c32cf3
... ... 
@@ -787,7 +787,7 @@ void SPU_WriteLong(uint32_t addr, uint32_t val)
787 787
788 788 
 //////////////////////////////////////////////////////////////////////////////
789 789
790 
-template<SPUInterpolationMode INTERPOLATE_MODE> static inline int32_t Interpolate(int32_t a, int32_t b, double ratio)
790 
+static inline int32_t Interpolate(int32_t a, int32_t b, double ratio, SPUInterpolationMode INTERPOLATE_MODE)
791 791 
 {
792 792 
 	double sampleA = static_cast<double>(a);
793 793 
 	double sampleB = static_cast<double>(b);
... ... 
@@ -817,7 +817,7 @@ template<SPUInterpolationMode INTERPOLATE_MODE> static inline int32_t Interpolat
817 817
818 818 
 //////////////////////////////////////////////////////////////////////////////
819 819
820 
-template<SPUInterpolationMode INTERPOLATE_MODE> static inline void Fetch8BitData(channel_struct *chan, int32_t *data)
820 
+static inline void Fetch8BitData(const channel_struct *const chan, int32_t *const data, SPUInterpolationMode INTERPOLATE_MODE)
821 821 
 {
822 822 
 	if (chan->sampcnt < 0)
823 823 
 	{
... ... 
@@ -832,7 +832,7 @@ template<SPUInterpolationMode INTERPOLATE_MODE> static inline void Fetch8BitData
832 832 
 		if (loc < (chan->totlength << 2) - 1)
833 833 
 		{
834 834 
 			int32_t b = static_cast<int32_t>(read_s8(chan->addr + loc + 1) << 8);
835 
-			a = Interpolate<INTERPOLATE_MODE>(a, b, chan->sampcnt);
835 
+			a = Interpolate(a, b, chan->sampcnt, INTERPOLATE_MODE);
836 836 
 		}
837 837 
 		*data = a;
838 838 
 	}
... ... 
@@ -840,7 +840,7 @@ template<SPUInterpolationMode INTERPOLATE_MODE> static inline void Fetch8BitData
840 840 
 		*data = static_cast<int32_t>(read_s8(chan->addr + loc) << 8);
841 841 
 }
842 842
843 
-template<SPUInterpolationMode INTERPOLATE_MODE> static inline void Fetch16BitData(const channel_struct * const chan, int32_t *data)
843 
+static inline void Fetch16BitData(const channel_struct *const chan, int32_t *const data, SPUInterpolationMode INTERPOLATE_MODE)
844 844 
 {
845 845 
 	if (chan->sampcnt < 0)
846 846 
 	{
... ... 
@@ -848,7 +848,7 @@ template<SPUInterpolationMode INTERPOLATE_MODE> static inline void Fetch16BitDat
848 848 
 		return;
849 849 
 	}
850 850
851 
-	if(INTERPOLATE_MODE != SPUInterpolation_None)
851 
+	if (INTERPOLATE_MODE != SPUInterpolation_None)
852 852 
 	{
853 853 
 		uint32_t loc = u32floor(chan->sampcnt);
854 854
... ... 
@@ -856,7 +856,7 @@ template<SPUInterpolationMode INTERPOLATE_MODE> static inline void Fetch16BitDat
856 856 
 		if (loc < (chan->totlength << 1) - 1)
857 857 
 		{
858 858 
 			int32_t b = static_cast<int32_t>(read16(loc * 2 + chan->addr + 2));
859 
-			a = Interpolate<INTERPOLATE_MODE>(a, b, chan->sampcnt);
859 
+			a = Interpolate(a, b, chan->sampcnt, INTERPOLATE_MODE);
860 860 
 		}
861 861 
 		*data = a;
862 862 
 	}
... ... 
@@ -864,7 +864,7 @@ template<SPUInterpolationMode INTERPOLATE_MODE> static inline void Fetch16BitDat
864 864 
 		*data = read16(chan->addr + u32floor(chan->sampcnt) * 2);
865 865 
 }
866 866
867 
-template<SPUInterpolationMode INTERPOLATE_MODE> static inline void FetchADPCMData(channel_struct * const chan, int32_t * const data)
867 
+static inline void FetchADPCMData(channel_struct *const chan, int32_t *const data, SPUInterpolationMode INTERPOLATE_MODE)
868 868 
 {
869 869 
 	if (chan->sampcnt < 8)
870 870 
 	{
... ... 
@@ -900,7 +900,7 @@ template<SPUInterpolationMode INTERPOLATE_MODE> static inline void FetchADPCMDat
900 900 
 	}
901 901
902 902 
 	if (INTERPOLATE_MODE != SPUInterpolation_None)
903 
-		*data = Interpolate<INTERPOLATE_MODE>(static_cast<int32_t>(chan->pcm16b_last), static_cast<int32_t>(chan->pcm16b), chan->sampcnt);
903 
+		*data = Interpolate(static_cast<int32_t>(chan->pcm16b_last), static_cast<int32_t>(chan->pcm16b), chan->sampcnt, INTERPOLATE_MODE);
904 904 
 	else
905 905 
 		*data = static_cast<int32_t>(chan->pcm16b);
906 906 
 }
... ... 
@@ -969,7 +969,7 @@ static inline void MixLR(SPU_struct *SPU, channel_struct *chan, int32_t data)
969 969
970 970 
 //////////////////////////////////////////////////////////////////////////////
971 971
972 
-template<int FORMAT> static inline void TestForLoop(SPU_struct *SPU, channel_struct *chan)
972 
+static inline void TestForLoop(SPU_struct *SPU, channel_struct *chan, int FORMAT)
973 973 
 {
974 974 
 	int shift = !FORMAT ? 2 : 1;
975 975
... ... 
@@ -1026,7 +1026,7 @@ static inline void TestForLoop2(SPU_struct *SPU, channel_struct *chan)
1026 1026 
 	}
1027 1027 
 }
1028 1028
1029 
-template<int CHANNELS> static inline void SPU_Mix(SPU_struct *SPU, channel_struct *chan, int32_t data)
1029 
+static inline void SPU_Mix(SPU_struct *SPU, channel_struct *chan, int32_t data, int CHANNELS)
1030 1030 
 {
1031 1031 
 	switch (CHANNELS)
1032 1032 
 	{
... ... 
@@ -1043,7 +1043,7 @@ template<int CHANNELS> static inline void SPU_Mix(SPU_struct *SPU, channel_struc
1043 1043 
 }
1044 1044
1045 1045 
 // WORK
1046 
-template<int FORMAT, SPUInterpolationMode INTERPOLATE_MODE, int CHANNELS> static inline void ____SPU_ChanUpdate(SPU_struct *const SPU, channel_struct *const chan)
1046 
+static inline void ____SPU_ChanUpdate(SPU_struct *const SPU, channel_struct *const chan, int FORMAT, SPUInterpolationMode INTERPOLATE_MODE, int CHANNELS)
1047 1047 
 {
1048 1048 
 	for (; SPU->bufpos < SPU->buflength; ++SPU->bufpos)
1049 1049 
 	{
... ... 
@@ -1053,25 +1053,25 @@ template<int FORMAT, SPUInterpolationMode INTERPOLATE_MODE, int CHANNELS> static
1053 1053 
 			switch (FORMAT)
1054 1054 
 			{
1055 1055 
 				case 0:
1056 
-					Fetch8BitData<INTERPOLATE_MODE>(chan, &data);
1056 
+					Fetch8BitData(chan, &data, INTERPOLATE_MODE);
1057 1057 
 					break;
1058 1058 
 				case 1:
1059 
-					Fetch16BitData<INTERPOLATE_MODE>(chan, &data);
1059 
+					Fetch16BitData(chan, &data, INTERPOLATE_MODE);
1060 1060 
 					break;
1061 1061 
 				case 2:
1062 
-					FetchADPCMData<INTERPOLATE_MODE>(chan, &data);
1062 
+					FetchADPCMData(chan, &data, INTERPOLATE_MODE);
1063 1063 
 					break;
1064 1064 
 				case 3:
1065 1065 
 					FetchPSGData(chan, &data);
1066 1066 
 			}
1067 
-			SPU_Mix<CHANNELS>(SPU, chan, data);
1067 
+			SPU_Mix(SPU, chan, data, CHANNELS);
1068 1068 
 		}
1069 1069
1070 1070 
 		switch (FORMAT)
1071 1071 
 		{
1072 1072 
 			case 0:
1073 1073 
 			case 1:
1074 
-				TestForLoop<FORMAT>(SPU, chan);
1074 
+				TestForLoop(SPU, chan, FORMAT);
1075 1075 
 				break;
1076 1076 
 			case 2:
1077 1077 
 				TestForLoop2(SPU, chan);
... ... 
@@ -1082,33 +1082,33 @@ template<int FORMAT, SPUInterpolationMode INTERPOLATE_MODE, int CHANNELS> static
1082 1082 
 	}
1083 1083 
 }
1084 1084
1085 
-template<int FORMAT, SPUInterpolationMode INTERPOLATE_MODE> static inline void ___SPU_ChanUpdate(bool actuallyMix, SPU_struct *const SPU, channel_struct *const chan)
1085 
+static inline void ___SPU_ChanUpdate(bool actuallyMix, SPU_struct *const SPU, channel_struct *const chan, int FORMAT, SPUInterpolationMode INTERPOLATE_MODE)
1086 1086 
 {
1087 1087 
 	if (!actuallyMix)
1088 
-		____SPU_ChanUpdate<FORMAT, INTERPOLATE_MODE, -1>(SPU, chan);
1088 
+		____SPU_ChanUpdate(SPU, chan, FORMAT, INTERPOLATE_MODE, -1);
1089 1089 
 	else if (!chan->pan)
1090 
-		____SPU_ChanUpdate<FORMAT, INTERPOLATE_MODE, 0>(SPU, chan);
1090 
+		____SPU_ChanUpdate(SPU, chan, FORMAT, INTERPOLATE_MODE, 0);
1091 1091 
 	else if (chan->pan == 127)
1092 
-		____SPU_ChanUpdate<FORMAT, INTERPOLATE_MODE, 2>(SPU, chan);
1092 
+		____SPU_ChanUpdate(SPU, chan, FORMAT, INTERPOLATE_MODE, 2);
1093 1093 
 	else
1094 
-		____SPU_ChanUpdate<FORMAT, INTERPOLATE_MODE, 1>(SPU, chan);
1094 
+		____SPU_ChanUpdate(SPU, chan, FORMAT, INTERPOLATE_MODE, 1);
1095 1095 
 }
1096 1096
1097 
-template<SPUInterpolationMode INTERPOLATE_MODE> static inline void __SPU_ChanUpdate(bool actuallyMix, SPU_struct *const SPU, channel_struct *const chan)
1097 
+static inline void __SPU_ChanUpdate(bool actuallyMix, SPU_struct *const SPU, channel_struct *const chan, SPUInterpolationMode INTERPOLATE_MODE)
1098 1098 
 {
1099 1099 
 	switch (chan->format)
1100 1100 
 	{
1101 1101 
 		case 0:
1102 
-			___SPU_ChanUpdate<0, INTERPOLATE_MODE>(actuallyMix, SPU, chan);
1102 
+			___SPU_ChanUpdate(actuallyMix, SPU, chan, 0, INTERPOLATE_MODE);
1103 1103 
 			break;
1104 1104 
 		case 1:
1105 
-			___SPU_ChanUpdate<1, INTERPOLATE_MODE>(actuallyMix, SPU, chan);
1105 
+			___SPU_ChanUpdate(actuallyMix, SPU, chan, 1, INTERPOLATE_MODE);
1106 1106 
 			break;
1107 1107 
 		case 2:
1108 
-			___SPU_ChanUpdate<2, INTERPOLATE_MODE>(actuallyMix, SPU, chan);
1108 
+			___SPU_ChanUpdate(actuallyMix, SPU, chan, 2, INTERPOLATE_MODE);
1109 1109 
 			break;
1110 1110 
 		case 3:
1111 
-			___SPU_ChanUpdate<3, INTERPOLATE_MODE>(actuallyMix, SPU, chan);
1111 
+			___SPU_ChanUpdate(actuallyMix, SPU, chan, 3, INTERPOLATE_MODE);
1112 1112 
 			break;
1113 1113 
 		default:
1114 1114 
 			assert(false);
... ... 
@@ -1120,13 +1120,13 @@ static inline void _SPU_ChanUpdate(bool actuallyMix, SPU_struct *const SPU, chan
1120 1120 
 	switch (CommonSettings.spuInterpolationMode)
1121 1121 
 	{
1122 1122 
 		case SPUInterpolation_None:
1123 
-			__SPU_ChanUpdate<SPUInterpolation_None>(actuallyMix, SPU, chan);
1123 
+			__SPU_ChanUpdate(actuallyMix, SPU, chan, SPUInterpolation_None);
1124 1124 
 			break;
1125 1125 
 		case SPUInterpolation_Linear:
1126 
-			__SPU_ChanUpdate<SPUInterpolation_Linear>(actuallyMix, SPU, chan);
1126 
+			__SPU_ChanUpdate(actuallyMix, SPU, chan, SPUInterpolation_Linear);
1127 1127 
 			break;
1128 1128 
 		case SPUInterpolation_Cosine:
1129 
-			__SPU_ChanUpdate<SPUInterpolation_Cosine>(actuallyMix, SPU, chan);
1129 
+			__SPU_ChanUpdate(actuallyMix, SPU, chan, SPUInterpolation_Cosine);
1130 1130 
 			break;
1131 1131 
 		default:
1132 1132 
 			assert(false);
src/in_2sf/desmume/version.cpp
History View file @ 7c32cf3
... ... 
@@ -32,7 +32,7 @@
32 32
33 33 
 #define DESMUME_NAME "DeSmuME"
34 34
35 
-#if defined(__x86_64__) || defined(__LP64) || defined(__IA64__) || defined(_M_X64) || defined(_WIN64)
35 
+#if defined(__x86_64__) || defined(__LP64) || defined(__IA64__) || defined(_M_X64) || defined(_WIN64)
36 36 
 # define DESMUME_PLATFORM_STRING " x64"
37 37 
 #elif defined(__i386__) || defined(_M_IX86) || defined(_WIN32)
38 38 
 # define DESMUME_PLATFORM_STRING " x86"