Browse code

Update snes9x code from 1.53 to 1.6.0.

Notable differences from upstream:
* Did not use the same #include setup for the new byuu apu and instead chose to do things more traditionally, as the latter is also much easier to deal with in Visual Studio than just including .cpp files into other .cpp files...
* MSU1 support not included (I see no need for this in a plugin meant to be used for original SNES music).
* The dynamic rate control on the APU not included (I also see no need for it in this plugin).
* The extra resamplers I added in were removed as the original hermite resampler was folded into a single non-inhertiable resampler.
* Bits of cleanup.

Naram Qashat authored on 2021/04/19 21:20:36
Showing 1 changed files
1 1
deleted file mode 100644
... ...
@@ -1,75 +0,0 @@
1
-// CPU Byte Order Utilities
2
-
3
-// snes_spc 0.9.0
4
-#pragma once
5
-
6
-#include "blargg_common.h"
7
-
8
-// BLARGG_CPU_CISC: Defined if CPU has very few general-purpose registers (< 16)
9
-#if defined(_M_IX86) || defined(_M_IA64) || defined(__i486__) || defined(__x86_64__) || defined(__ia64__) || defined(__i386__)
10
-# define BLARGG_CPU_X86 1
11
-# define BLARGG_CPU_CISC 1
12
-#else
13
-# define BLARGG_CPU_X86 0
14
-# define BLARGG_CPU_CISC 0
15
-#endif
16
-
17
-#if defined(__powerpc__) || defined(__ppc__) || defined(__POWERPC__) || defined(__powerc)
18
-# define BLARGG_CPU_POWERPC 1
19
-# define BLARGG_CPU_RISC 1
20
-#else
21
-# define BLARGG_CPU_POWERPC 0
22
-# define BLARGG_CPU_RISC 0
23
-#endif
24
-
25
-// BLARGG_BIG_ENDIAN, BLARGG_LITTLE_ENDIAN: Determined automatically, otherwise only
26
-// one may be #defined to 1. Only needed if something actually depends on byte order.
27
-#if !defined(BLARGG_BIG_ENDIAN) && !defined(BLARGG_LITTLE_ENDIAN)
28
-# ifdef __GLIBC__
29
-// GCC handles this for us
30
-#  include <endian.h>
31
-#  if __BYTE_ORDER == __LITTLE_ENDIAN
32
-#   define BLARGG_LITTLE_ENDIAN 1
33
-#   define BLARGG_BIG_ENDIAN 0
34
-#  elif __BYTE_ORDER == __BIG_ENDIAN
35
-#   define BLARGG_BIG_ENDIAN 1
36
-#   define BLARGG_LITTLE_ENDIAN 0
37
-#  endif
38
-# else
39
-#  if defined(LSB_FIRST) || defined(__LITTLE_ENDIAN__) || BLARGG_CPU_X86 || (defined(LITTLE_ENDIAN) && LITTLE_ENDIAN + 0 != 1234)
40
-#   define BLARGG_LITTLE_ENDIAN 1
41
-#   define BLARGG_BIG_ENDIAN 0
42
-#  elif defined(MSB_FIRST) || defined(__BIG_ENDIAN__) || defined(WORDS_BIGENDIAN) || defined(__sparc__) || BLARGG_CPU_POWERPC || (defined(BIG_ENDIAN) && BIG_ENDIAN + 0 != 4321)
43
-#   define BLARGG_BIG_ENDIAN 1
44
-#   define BLARGG_LITTLE_ENDIAN 0
45
-#  else
46
-// No endian specified; assume little-endian, since it's most common
47
-#   define BLARGG_LITTLE_ENDIAN 1
48
-#   define BLARGG_BIG_ENDIAN 0
49
-#  endif
50
-# endif
51
-#endif
52
-
53
-#if BLARGG_LITTLE_ENDIAN && BLARGG_BIG_ENDIAN
54
-# undef BLARGG_LITTLE_ENDIAN
55
-# undef BLARGG_BIG_ENDIAN
56
-#endif
57
-
58
-inline void blargg_verify_byte_order()
59
-{
60
-#ifndef NDEBUG
61
-	volatile int i = 1;
62
-	assert(*reinterpret_cast<volatile char *>(&i));
63
-#endif
64
-}
65
-
66
-inline unsigned get_le16(const uint8_t *p)
67
-{
68
-	return static_cast<unsigned>(p[1] << 8) | static_cast<unsigned>(p[0]);
69
-}
70
-
71
-inline void set_le16(uint8_t *p, unsigned n)
72
-{
73
-	p[1] = static_cast<unsigned char>(n >> 8);
74
-	p[0] = static_cast<unsigned char>(n);
75
-}
Browse code

* Small Makefile changes.

* Removed a couple files that were not being used.
* Cleanups found with clang's -Weverything (and shutting it up about a
lot of things that were ridiculous, as well as ignoring some of the
warnings still coming up).

Naram Qashat authored on 2014/09/25 12:28:21
Showing 1 changed files
... ...
@@ -9,11 +9,17 @@
9 9
 #if defined(_M_IX86) || defined(_M_IA64) || defined(__i486__) || defined(__x86_64__) || defined(__ia64__) || defined(__i386__)
10 10
 # define BLARGG_CPU_X86 1
11 11
 # define BLARGG_CPU_CISC 1
12
+#else
13
+# define BLARGG_CPU_X86 0
14
+# define BLARGG_CPU_CISC 0
12 15
 #endif
13 16
 
14 17
 #if defined(__powerpc__) || defined(__ppc__) || defined(__POWERPC__) || defined(__powerc)
15 18
 # define BLARGG_CPU_POWERPC 1
16 19
 # define BLARGG_CPU_RISC 1
20
+#else
21
+# define BLARGG_CPU_POWERPC 0
22
+# define BLARGG_CPU_RISC 0
17 23
 #endif
18 24
 
19 25
 // BLARGG_BIG_ENDIAN, BLARGG_LITTLE_ENDIAN: Determined automatically, otherwise only
... ...
@@ -24,18 +30,22 @@
24 30
 #  include <endian.h>
25 31
 #  if __BYTE_ORDER == __LITTLE_ENDIAN
26 32
 #   define BLARGG_LITTLE_ENDIAN 1
33
+#   define BLARGG_BIG_ENDIAN 0
27 34
 #  elif __BYTE_ORDER == __BIG_ENDIAN
28 35
 #   define BLARGG_BIG_ENDIAN 1
36
+#   define BLARGG_LITTLE_ENDIAN 0
29 37
 #  endif
30 38
 # else
31 39
 #  if defined(LSB_FIRST) || defined(__LITTLE_ENDIAN__) || BLARGG_CPU_X86 || (defined(LITTLE_ENDIAN) && LITTLE_ENDIAN + 0 != 1234)
32 40
 #   define BLARGG_LITTLE_ENDIAN 1
33
-#  endif
34
-#  if defined(MSB_FIRST) || defined(__BIG_ENDIAN__) || defined(WORDS_BIGENDIAN) || defined (__sparc__) || BLARGG_CPU_POWERPC || (defined(BIG_ENDIAN) && BIG_ENDIAN + 0 != 4321)
41
+#   define BLARGG_BIG_ENDIAN 0
42
+#  elif defined(MSB_FIRST) || defined(__BIG_ENDIAN__) || defined(WORDS_BIGENDIAN) || defined(__sparc__) || BLARGG_CPU_POWERPC || (defined(BIG_ENDIAN) && BIG_ENDIAN + 0 != 4321)
35 43
 #   define BLARGG_BIG_ENDIAN 1
36
-#  elif !defined (__mips__)
44
+#   define BLARGG_LITTLE_ENDIAN 0
45
+#  else
37 46
 // No endian specified; assume little-endian, since it's most common
38 47
 #   define BLARGG_LITTLE_ENDIAN 1
48
+#   define BLARGG_BIG_ENDIAN 0
39 49
 #  endif
40 50
 # endif
41 51
 #endif
Browse code

A few more cases of using #pragma once instead of include guards.

Naram Qashat authored on 2014/09/08 14:51:19
Showing 1 changed files
... ...
@@ -1,8 +1,7 @@
1 1
 // CPU Byte Order Utilities
2 2
 
3 3
 // snes_spc 0.9.0
4
-#ifndef BLARGG_ENDIAN
5
-#define BLARGG_ENDIAN
4
+#pragma once
6 5
 
7 6
 #include "blargg_common.h"
8 7
 
... ...
@@ -64,5 +63,3 @@ inline void set_le16(uint8_t *p, unsigned n)
64 63
 	p[1] = static_cast<unsigned char>(n >> 8);
65 64
 	p[0] = static_cast<unsigned char>(n);
66 65
 }
67
-
68
-#endif
Browse code

[SNSF] Massive code cleanup, as well as removing as much unused code/variables as possible.

Naram Qashat authored on 2013/05/23 06:02:16
Showing 1 changed files
... ...
@@ -7,179 +7,62 @@
7 7
 #include "blargg_common.h"
8 8
 
9 9
 // BLARGG_CPU_CISC: Defined if CPU has very few general-purpose registers (< 16)
10
-#if defined (_M_IX86) || defined (_M_IA64) || defined (__i486__) || \
11
-		defined (__x86_64__) || defined (__ia64__) || defined (__i386__)
12
-	#define BLARGG_CPU_X86 1
13
-	#define BLARGG_CPU_CISC 1
10
+#if defined(_M_IX86) || defined(_M_IA64) || defined(__i486__) || defined(__x86_64__) || defined(__ia64__) || defined(__i386__)
11
+# define BLARGG_CPU_X86 1
12
+# define BLARGG_CPU_CISC 1
14 13
 #endif
15 14
 
16
-#if defined (__powerpc__) || defined (__ppc__) || defined (__POWERPC__) || defined (__powerc)
17
-	#define BLARGG_CPU_POWERPC 1
18
-	#define BLARGG_CPU_RISC 1
15
+#if defined(__powerpc__) || defined(__ppc__) || defined(__POWERPC__) || defined(__powerc)
16
+# define BLARGG_CPU_POWERPC 1
17
+# define BLARGG_CPU_RISC 1
19 18
 #endif
20 19
 
21 20
 // BLARGG_BIG_ENDIAN, BLARGG_LITTLE_ENDIAN: Determined automatically, otherwise only
22 21
 // one may be #defined to 1. Only needed if something actually depends on byte order.
23
-#if !defined (BLARGG_BIG_ENDIAN) && !defined (BLARGG_LITTLE_ENDIAN)
24
-#ifdef __GLIBC__
25
-	// GCC handles this for us
26
-	#include <endian.h>
27
-	#if __BYTE_ORDER == __LITTLE_ENDIAN
28
-		#define BLARGG_LITTLE_ENDIAN 1
29
-	#elif __BYTE_ORDER == __BIG_ENDIAN
30
-		#define BLARGG_BIG_ENDIAN 1
31
-	#endif
32
-#else
33
-
34
-#if defined (LSB_FIRST) || defined (__LITTLE_ENDIAN__) || BLARGG_CPU_X86 || \
35
-		(defined (LITTLE_ENDIAN) && LITTLE_ENDIAN+0 != 1234)
36
-	#define BLARGG_LITTLE_ENDIAN 1
37
-#endif
38
-
39
-#if defined (MSB_FIRST)     || defined (__BIG_ENDIAN__) || defined (WORDS_BIGENDIAN) || \
40
-	defined (__sparc__)     ||  BLARGG_CPU_POWERPC || \
41
-	(defined (BIG_ENDIAN) && BIG_ENDIAN+0 != 4321)
42
-	#define BLARGG_BIG_ENDIAN 1
43
-#elif !defined (__mips__)
44
-	// No endian specified; assume little-endian, since it's most common
45
-	#define BLARGG_LITTLE_ENDIAN 1
46
-#endif
47
-#endif
22
+#if !defined(BLARGG_BIG_ENDIAN) && !defined(BLARGG_LITTLE_ENDIAN)
23
+# ifdef __GLIBC__
24
+// GCC handles this for us
25
+#  include <endian.h>
26
+#  if __BYTE_ORDER == __LITTLE_ENDIAN
27
+#   define BLARGG_LITTLE_ENDIAN 1
28
+#  elif __BYTE_ORDER == __BIG_ENDIAN
29
+#   define BLARGG_BIG_ENDIAN 1
30
+#  endif
31
+# else
32
+#  if defined(LSB_FIRST) || defined(__LITTLE_ENDIAN__) || BLARGG_CPU_X86 || (defined(LITTLE_ENDIAN) && LITTLE_ENDIAN + 0 != 1234)
33
+#   define BLARGG_LITTLE_ENDIAN 1
34
+#  endif
35
+#  if defined(MSB_FIRST) || defined(__BIG_ENDIAN__) || defined(WORDS_BIGENDIAN) || defined (__sparc__) || BLARGG_CPU_POWERPC || (defined(BIG_ENDIAN) && BIG_ENDIAN + 0 != 4321)
36
+#   define BLARGG_BIG_ENDIAN 1
37
+#  elif !defined (__mips__)
38
+// No endian specified; assume little-endian, since it's most common
39
+#   define BLARGG_LITTLE_ENDIAN 1
40
+#  endif
41
+# endif
48 42
 #endif
49 43
 
50 44
 #if BLARGG_LITTLE_ENDIAN && BLARGG_BIG_ENDIAN
51
-	#undef BLARGG_LITTLE_ENDIAN
52
-	#undef BLARGG_BIG_ENDIAN
45
+# undef BLARGG_LITTLE_ENDIAN
46
+# undef BLARGG_BIG_ENDIAN
53 47
 #endif
54 48
 
55 49
 inline void blargg_verify_byte_order()
56 50
 {
57
-	#ifndef NDEBUG
58
-		#if BLARGG_BIG_ENDIAN
59
-			volatile int i = 1;
60
-			assert( *(volatile char*) &i == 0 );
61
-		#elif BLARGG_LITTLE_ENDIAN
62
-			volatile int i = 1;
63
-			assert( *(volatile char*) &i != 0 );
64
-		#endif
65
-	#endif
66
-}
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-
68
-inline unsigned get_le16( void const* p )
69
-{
70
-	return  (unsigned) ((unsigned char const*) p) [1] << 8 |
71
-			(unsigned) ((unsigned char const*) p) [0];
72
-}
73
-
74
-inline unsigned get_be16( void const* p )
75
-{
76
-	return  (unsigned) ((unsigned char const*) p) [0] << 8 |
77
-			(unsigned) ((unsigned char const*) p) [1];
78
-}
79
-
80
-inline blargg_ulong get_le32( void const* p )
81
-{
82
-	return  (blargg_ulong) ((unsigned char const*) p) [3] << 24 |
83
-			(blargg_ulong) ((unsigned char const*) p) [2] << 16 |
84
-			(blargg_ulong) ((unsigned char const*) p) [1] <<  8 |
85
-			(blargg_ulong) ((unsigned char const*) p) [0];
86
-}
87
-
88
-inline blargg_ulong get_be32( void const* p )
89
-{
90
-	return  (blargg_ulong) ((unsigned char const*) p) [0] << 24 |
91
-			(blargg_ulong) ((unsigned char const*) p) [1] << 16 |
92
-			(blargg_ulong) ((unsigned char const*) p) [2] <<  8 |
93
-			(blargg_ulong) ((unsigned char const*) p) [3];
94
-}
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-
96
-inline void set_le16( void* p, unsigned n )
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-{
98
-	((unsigned char*) p) [1] = (unsigned char) (n >> 8);
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-	((unsigned char*) p) [0] = (unsigned char) n;
100
-}
101
-
102
-inline void set_be16( void* p, unsigned n )
103
-{
104
-	((unsigned char*) p) [0] = (unsigned char) (n >> 8);
105
-	((unsigned char*) p) [1] = (unsigned char) n;
51
+#ifndef NDEBUG
52
+	volatile int i = 1;
53
+	assert(*reinterpret_cast<volatile char *>(&i));
54
+#endif
106 55
 }
107 56
 
108
-inline void set_le32( void* p, blargg_ulong n )
57
+inline unsigned get_le16(const uint8_t *p)
109 58
 {
110
-	((unsigned char*) p) [0] = (unsigned char) n;
111
-	((unsigned char*) p) [1] = (unsigned char) (n >> 8);
112
-	((unsigned char*) p) [2] = (unsigned char) (n >> 16);
113
-	((unsigned char*) p) [3] = (unsigned char) (n >> 24);
59
+	return static_cast<unsigned>(p[1] << 8) | static_cast<unsigned>(p[0]);
114 60
 }
115 61
 
116
-inline void set_be32( void* p, blargg_ulong n )
62
+inline void set_le16(uint8_t *p, unsigned n)
117 63
 {
118
-	((unsigned char*) p) [3] = (unsigned char) n;
119
-	((unsigned char*) p) [2] = (unsigned char) (n >> 8);
120
-	((unsigned char*) p) [1] = (unsigned char) (n >> 16);
121
-	((unsigned char*) p) [0] = (unsigned char) (n >> 24);
64
+	p[1] = static_cast<unsigned char>(n >> 8);
65
+	p[0] = static_cast<unsigned char>(n);
122 66
 }
123 67
 
124
-#if BLARGG_NONPORTABLE
125
-	// Optimized implementation if byte order is known
126
-	#if BLARGG_LITTLE_ENDIAN
127
-		#define GET_LE16( addr )        (*(BOOST::uint16_t*) (addr))
128
-		#define GET_LE32( addr )        (*(BOOST::uint32_t*) (addr))
129
-		#define SET_LE16( addr, data )  (void) (*(BOOST::uint16_t*) (addr) = (data))
130
-		#define SET_LE32( addr, data )  (void) (*(BOOST::uint32_t*) (addr) = (data))
131
-	#elif BLARGG_BIG_ENDIAN
132
-		#define GET_BE16( addr )        (*(BOOST::uint16_t*) (addr))
133
-		#define GET_BE32( addr )        (*(BOOST::uint32_t*) (addr))
134
-		#define SET_BE16( addr, data )  (void) (*(BOOST::uint16_t*) (addr) = (data))
135
-		#define SET_BE32( addr, data )  (void) (*(BOOST::uint32_t*) (addr) = (data))
136
-		
137
-		#if BLARGG_CPU_POWERPC
138
-			// PowerPC has special byte-reversed instructions
139
-			#if defined (__MWERKS__)
140
-				#define GET_LE16( addr )        (__lhbrx( addr, 0 ))
141
-				#define GET_LE32( addr )        (__lwbrx( addr, 0 ))
142
-				#define SET_LE16( addr, in )    (__sthbrx( in, addr, 0 ))
143
-				#define SET_LE32( addr, in )    (__stwbrx( in, addr, 0 ))
144
-			#elif defined (__GNUC__)
145
-				#define GET_LE16( addr )        ({unsigned ppc_lhbrx_; asm( "lhbrx %0,0,%1" : "=r" (ppc_lhbrx_) : "r" (addr), "0" (ppc_lhbrx_) ); ppc_lhbrx_;})
146
-				#define GET_LE32( addr )        ({unsigned ppc_lwbrx_; asm( "lwbrx %0,0,%1" : "=r" (ppc_lwbrx_) : "r" (addr), "0" (ppc_lwbrx_) ); ppc_lwbrx_;})
147
-				#define SET_LE16( addr, in )    ({asm( "sthbrx %0,0,%1" : : "r" (in), "r" (addr) );})
148
-				#define SET_LE32( addr, in )    ({asm( "stwbrx %0,0,%1" : : "r" (in), "r" (addr) );})
149
-			#endif
150
-		#endif
151
-	#endif
152
-#endif
153
-
154
-#ifndef GET_LE16
155
-	#define GET_LE16( addr )        get_le16( addr )
156
-	#define SET_LE16( addr, data )  set_le16( addr, data )
157
-#endif
158
-
159
-#ifndef GET_LE32
160
-	#define GET_LE32( addr )        get_le32( addr )
161
-	#define SET_LE32( addr, data )  set_le32( addr, data )
162
-#endif
163
-
164
-#ifndef GET_BE16
165
-	#define GET_BE16( addr )        get_be16( addr )
166
-	#define SET_BE16( addr, data )  set_be16( addr, data )
167
-#endif
168
-
169
-#ifndef GET_BE32
170
-	#define GET_BE32( addr )        get_be32( addr )
171
-	#define SET_BE32( addr, data )  set_be32( addr, data )
172
-#endif
173
-
174
-// auto-selecting versions
175
-
176
-inline void set_le( BOOST::uint16_t* p, unsigned     n ) { SET_LE16( p, n ); }
177
-inline void set_le( BOOST::uint32_t* p, blargg_ulong n ) { SET_LE32( p, n ); }
178
-inline void set_be( BOOST::uint16_t* p, unsigned     n ) { SET_BE16( p, n ); }
179
-inline void set_be( BOOST::uint32_t* p, blargg_ulong n ) { SET_BE32( p, n ); }
180
-inline unsigned     get_le( BOOST::uint16_t* p ) { return GET_LE16( p ); }
181
-inline blargg_ulong get_le( BOOST::uint32_t* p ) { return GET_LE32( p ); }
182
-inline unsigned     get_be( BOOST::uint16_t* p ) { return GET_BE16( p ); }
183
-inline blargg_ulong get_be( BOOST::uint32_t* p ) { return GET_BE32( p ); }
184
-
185 68
 #endif
Browse code

Import actual code.

Naram Qashat authored on 2013/03/26 02:41:19
Showing 1 changed files
1 1
new file mode 100644
... ...
@@ -0,0 +1,185 @@
1
+// CPU Byte Order Utilities
2
+
3
+// snes_spc 0.9.0
4
+#ifndef BLARGG_ENDIAN
5
+#define BLARGG_ENDIAN
6
+
7
+#include "blargg_common.h"
8
+
9
+// BLARGG_CPU_CISC: Defined if CPU has very few general-purpose registers (< 16)
10
+#if defined (_M_IX86) || defined (_M_IA64) || defined (__i486__) || \
11
+		defined (__x86_64__) || defined (__ia64__) || defined (__i386__)
12
+	#define BLARGG_CPU_X86 1
13
+	#define BLARGG_CPU_CISC 1
14
+#endif
15
+
16
+#if defined (__powerpc__) || defined (__ppc__) || defined (__POWERPC__) || defined (__powerc)
17
+	#define BLARGG_CPU_POWERPC 1
18
+	#define BLARGG_CPU_RISC 1
19
+#endif
20
+
21
+// BLARGG_BIG_ENDIAN, BLARGG_LITTLE_ENDIAN: Determined automatically, otherwise only
22
+// one may be #defined to 1. Only needed if something actually depends on byte order.
23
+#if !defined (BLARGG_BIG_ENDIAN) && !defined (BLARGG_LITTLE_ENDIAN)
24
+#ifdef __GLIBC__
25
+	// GCC handles this for us
26
+	#include <endian.h>
27
+	#if __BYTE_ORDER == __LITTLE_ENDIAN
28
+		#define BLARGG_LITTLE_ENDIAN 1
29
+	#elif __BYTE_ORDER == __BIG_ENDIAN
30
+		#define BLARGG_BIG_ENDIAN 1
31
+	#endif
32
+#else
33
+
34
+#if defined (LSB_FIRST) || defined (__LITTLE_ENDIAN__) || BLARGG_CPU_X86 || \
35
+		(defined (LITTLE_ENDIAN) && LITTLE_ENDIAN+0 != 1234)
36
+	#define BLARGG_LITTLE_ENDIAN 1
37
+#endif
38
+
39
+#if defined (MSB_FIRST)     || defined (__BIG_ENDIAN__) || defined (WORDS_BIGENDIAN) || \
40
+	defined (__sparc__)     ||  BLARGG_CPU_POWERPC || \
41
+	(defined (BIG_ENDIAN) && BIG_ENDIAN+0 != 4321)
42
+	#define BLARGG_BIG_ENDIAN 1
43
+#elif !defined (__mips__)
44
+	// No endian specified; assume little-endian, since it's most common
45
+	#define BLARGG_LITTLE_ENDIAN 1
46
+#endif
47
+#endif
48
+#endif
49
+
50
+#if BLARGG_LITTLE_ENDIAN && BLARGG_BIG_ENDIAN
51
+	#undef BLARGG_LITTLE_ENDIAN
52
+	#undef BLARGG_BIG_ENDIAN
53
+#endif
54
+
55
+inline void blargg_verify_byte_order()
56
+{
57
+	#ifndef NDEBUG
58
+		#if BLARGG_BIG_ENDIAN
59
+			volatile int i = 1;
60
+			assert( *(volatile char*) &i == 0 );
61
+		#elif BLARGG_LITTLE_ENDIAN
62
+			volatile int i = 1;
63
+			assert( *(volatile char*) &i != 0 );
64
+		#endif
65
+	#endif
66
+}
67
+
68
+inline unsigned get_le16( void const* p )
69
+{
70
+	return  (unsigned) ((unsigned char const*) p) [1] << 8 |
71
+			(unsigned) ((unsigned char const*) p) [0];
72
+}
73
+
74
+inline unsigned get_be16( void const* p )
75
+{
76
+	return  (unsigned) ((unsigned char const*) p) [0] << 8 |
77
+			(unsigned) ((unsigned char const*) p) [1];
78
+}
79
+
80
+inline blargg_ulong get_le32( void const* p )
81
+{
82
+	return  (blargg_ulong) ((unsigned char const*) p) [3] << 24 |
83
+			(blargg_ulong) ((unsigned char const*) p) [2] << 16 |
84
+			(blargg_ulong) ((unsigned char const*) p) [1] <<  8 |
85
+			(blargg_ulong) ((unsigned char const*) p) [0];
86
+}
87
+
88
+inline blargg_ulong get_be32( void const* p )
89
+{
90
+	return  (blargg_ulong) ((unsigned char const*) p) [0] << 24 |
91
+			(blargg_ulong) ((unsigned char const*) p) [1] << 16 |
92
+			(blargg_ulong) ((unsigned char const*) p) [2] <<  8 |
93
+			(blargg_ulong) ((unsigned char const*) p) [3];
94
+}
95
+
96
+inline void set_le16( void* p, unsigned n )
97
+{
98
+	((unsigned char*) p) [1] = (unsigned char) (n >> 8);
99
+	((unsigned char*) p) [0] = (unsigned char) n;
100
+}
101
+
102
+inline void set_be16( void* p, unsigned n )
103
+{
104
+	((unsigned char*) p) [0] = (unsigned char) (n >> 8);
105
+	((unsigned char*) p) [1] = (unsigned char) n;
106
+}
107
+
108
+inline void set_le32( void* p, blargg_ulong n )
109
+{
110
+	((unsigned char*) p) [0] = (unsigned char) n;
111
+	((unsigned char*) p) [1] = (unsigned char) (n >> 8);
112
+	((unsigned char*) p) [2] = (unsigned char) (n >> 16);
113
+	((unsigned char*) p) [3] = (unsigned char) (n >> 24);
114
+}
115
+
116
+inline void set_be32( void* p, blargg_ulong n )
117
+{
118
+	((unsigned char*) p) [3] = (unsigned char) n;
119
+	((unsigned char*) p) [2] = (unsigned char) (n >> 8);
120
+	((unsigned char*) p) [1] = (unsigned char) (n >> 16);
121
+	((unsigned char*) p) [0] = (unsigned char) (n >> 24);
122
+}
123
+
124
+#if BLARGG_NONPORTABLE
125
+	// Optimized implementation if byte order is known
126
+	#if BLARGG_LITTLE_ENDIAN
127
+		#define GET_LE16( addr )        (*(BOOST::uint16_t*) (addr))
128
+		#define GET_LE32( addr )        (*(BOOST::uint32_t*) (addr))
129
+		#define SET_LE16( addr, data )  (void) (*(BOOST::uint16_t*) (addr) = (data))
130
+		#define SET_LE32( addr, data )  (void) (*(BOOST::uint32_t*) (addr) = (data))
131
+	#elif BLARGG_BIG_ENDIAN
132
+		#define GET_BE16( addr )        (*(BOOST::uint16_t*) (addr))
133
+		#define GET_BE32( addr )        (*(BOOST::uint32_t*) (addr))
134
+		#define SET_BE16( addr, data )  (void) (*(BOOST::uint16_t*) (addr) = (data))
135
+		#define SET_BE32( addr, data )  (void) (*(BOOST::uint32_t*) (addr) = (data))
136
+		
137
+		#if BLARGG_CPU_POWERPC
138
+			// PowerPC has special byte-reversed instructions
139
+			#if defined (__MWERKS__)
140
+				#define GET_LE16( addr )        (__lhbrx( addr, 0 ))
141
+				#define GET_LE32( addr )        (__lwbrx( addr, 0 ))
142
+				#define SET_LE16( addr, in )    (__sthbrx( in, addr, 0 ))
143
+				#define SET_LE32( addr, in )    (__stwbrx( in, addr, 0 ))
144
+			#elif defined (__GNUC__)
145
+				#define GET_LE16( addr )        ({unsigned ppc_lhbrx_; asm( "lhbrx %0,0,%1" : "=r" (ppc_lhbrx_) : "r" (addr), "0" (ppc_lhbrx_) ); ppc_lhbrx_;})
146
+				#define GET_LE32( addr )        ({unsigned ppc_lwbrx_; asm( "lwbrx %0,0,%1" : "=r" (ppc_lwbrx_) : "r" (addr), "0" (ppc_lwbrx_) ); ppc_lwbrx_;})
147
+				#define SET_LE16( addr, in )    ({asm( "sthbrx %0,0,%1" : : "r" (in), "r" (addr) );})
148
+				#define SET_LE32( addr, in )    ({asm( "stwbrx %0,0,%1" : : "r" (in), "r" (addr) );})
149
+			#endif
150
+		#endif
151
+	#endif
152
+#endif
153
+
154
+#ifndef GET_LE16
155
+	#define GET_LE16( addr )        get_le16( addr )
156
+	#define SET_LE16( addr, data )  set_le16( addr, data )
157
+#endif
158
+
159
+#ifndef GET_LE32
160
+	#define GET_LE32( addr )        get_le32( addr )
161
+	#define SET_LE32( addr, data )  set_le32( addr, data )
162
+#endif
163
+
164
+#ifndef GET_BE16
165
+	#define GET_BE16( addr )        get_be16( addr )
166
+	#define SET_BE16( addr, data )  set_be16( addr, data )
167
+#endif
168
+
169
+#ifndef GET_BE32
170
+	#define GET_BE32( addr )        get_be32( addr )
171
+	#define SET_BE32( addr, data )  set_be32( addr, data )
172
+#endif
173
+
174
+// auto-selecting versions
175
+
176
+inline void set_le( BOOST::uint16_t* p, unsigned     n ) { SET_LE16( p, n ); }
177
+inline void set_le( BOOST::uint32_t* p, blargg_ulong n ) { SET_LE32( p, n ); }
178
+inline void set_be( BOOST::uint16_t* p, unsigned     n ) { SET_BE16( p, n ); }
179
+inline void set_be( BOOST::uint32_t* p, blargg_ulong n ) { SET_BE32( p, n ); }
180
+inline unsigned     get_le( BOOST::uint16_t* p ) { return GET_LE16( p ); }
181
+inline blargg_ulong get_le( BOOST::uint32_t* p ) { return GET_LE32( p ); }
182
+inline unsigned     get_be( BOOST::uint16_t* p ) { return GET_BE16( p ); }
183
+inline blargg_ulong get_be( BOOST::uint32_t* p ) { return GET_BE32( p ); }
184
+
185
+#endif