Notable differences from upstream:
* Did not use the same #include setup for the new byuu apu and instead chose to do things more traditionally, as the latter is also much easier to deal with in Visual Studio than just including .cpp files into other .cpp files...
* MSU1 support not included (I see no need for this in a plugin meant to be used for original SNES music).
* The dynamic rate control on the APU not included (I also see no need for it in this plugin).
* The extra resamplers I added in were removed as the original hermite resampler was folded into a single non-inhertiable resampler.
* Bits of cleanup.
| ... | ... |
@@ -1,179 +1,8 @@ |
| 1 |
-/*********************************************************************************** |
|
| 1 |
+/*****************************************************************************\ |
|
| 2 | 2 |
Snes9x - Portable Super Nintendo Entertainment System (TM) emulator. |
| 3 |
- |
|
| 4 |
- (c) Copyright 1996 - 2002 Gary Henderson (gary.henderson@ntlworld.com), |
|
| 5 |
- Jerremy Koot (jkoot@snes9x.com) |
|
| 6 |
- |
|
| 7 |
- (c) Copyright 2002 - 2004 Matthew Kendora |
|
| 8 |
- |
|
| 9 |
- (c) Copyright 2002 - 2005 Peter Bortas (peter@bortas.org) |
|
| 10 |
- |
|
| 11 |
- (c) Copyright 2004 - 2005 Joel Yliluoma (http://iki.fi/bisqwit/) |
|
| 12 |
- |
|
| 13 |
- (c) Copyright 2001 - 2006 John Weidman (jweidman@slip.net) |
|
| 14 |
- |
|
| 15 |
- (c) Copyright 2002 - 2006 funkyass (funkyass@spam.shaw.ca), |
|
| 16 |
- Kris Bleakley (codeviolation@hotmail.com) |
|
| 17 |
- |
|
| 18 |
- (c) Copyright 2002 - 2010 Brad Jorsch (anomie@users.sourceforge.net), |
|
| 19 |
- Nach (n-a-c-h@users.sourceforge.net), |
|
| 20 |
- |
|
| 21 |
- (c) Copyright 2002 - 2011 zones (kasumitokoduck@yahoo.com) |
|
| 22 |
- |
|
| 23 |
- (c) Copyright 2006 - 2007 nitsuja |
|
| 24 |
- |
|
| 25 |
- (c) Copyright 2009 - 2011 BearOso, |
|
| 26 |
- OV2 |
|
| 27 |
- |
|
| 28 |
- |
|
| 29 |
- BS-X C emulator code |
|
| 30 |
- (c) Copyright 2005 - 2006 Dreamer Nom, |
|
| 31 |
- zones |
|
| 32 |
- |
|
| 33 |
- C4 x86 assembler and some C emulation code |
|
| 34 |
- (c) Copyright 2000 - 2003 _Demo_ (_demo_@zsnes.com), |
|
| 35 |
- Nach, |
|
| 36 |
- zsKnight (zsknight@zsnes.com) |
|
| 37 |
- |
|
| 38 |
- C4 C++ code |
|
| 39 |
- (c) Copyright 2003 - 2006 Brad Jorsch, |
|
| 40 |
- Nach |
|
| 41 |
- |
|
| 42 |
- DSP-1 emulator code |
|
| 43 |
- (c) Copyright 1998 - 2006 _Demo_, |
|
| 44 |
- Andreas Naive (andreasnaive@gmail.com), |
|
| 45 |
- Gary Henderson, |
|
| 46 |
- Ivar (ivar@snes9x.com), |
|
| 47 |
- John Weidman, |
|
| 48 |
- Kris Bleakley, |
|
| 49 |
- Matthew Kendora, |
|
| 50 |
- Nach, |
|
| 51 |
- neviksti (neviksti@hotmail.com) |
|
| 52 |
- |
|
| 53 |
- DSP-2 emulator code |
|
| 54 |
- (c) Copyright 2003 John Weidman, |
|
| 55 |
- Kris Bleakley, |
|
| 56 |
- Lord Nightmare (lord_nightmare@users.sourceforge.net), |
|
| 57 |
- Matthew Kendora, |
|
| 58 |
- neviksti |
|
| 59 |
- |
|
| 60 |
- DSP-3 emulator code |
|
| 61 |
- (c) Copyright 2003 - 2006 John Weidman, |
|
| 62 |
- Kris Bleakley, |
|
| 63 |
- Lancer, |
|
| 64 |
- z80 gaiden |
|
| 65 |
- |
|
| 66 |
- DSP-4 emulator code |
|
| 67 |
- (c) Copyright 2004 - 2006 Dreamer Nom, |
|
| 68 |
- John Weidman, |
|
| 69 |
- Kris Bleakley, |
|
| 70 |
- Nach, |
|
| 71 |
- z80 gaiden |
|
| 72 |
- |
|
| 73 |
- OBC1 emulator code |
|
| 74 |
- (c) Copyright 2001 - 2004 zsKnight, |
|
| 75 |
- pagefault (pagefault@zsnes.com), |
|
| 76 |
- Kris Bleakley |
|
| 77 |
- Ported from x86 assembler to C by sanmaiwashi |
|
| 78 |
- |
|
| 79 |
- SPC7110 and RTC C++ emulator code used in 1.39-1.51 |
|
| 80 |
- (c) Copyright 2002 Matthew Kendora with research by |
|
| 81 |
- zsKnight, |
|
| 82 |
- John Weidman, |
|
| 83 |
- Dark Force |
|
| 84 |
- |
|
| 85 |
- SPC7110 and RTC C++ emulator code used in 1.52+ |
|
| 86 |
- (c) Copyright 2009 byuu, |
|
| 87 |
- neviksti |
|
| 88 |
- |
|
| 89 |
- S-DD1 C emulator code |
|
| 90 |
- (c) Copyright 2003 Brad Jorsch with research by |
|
| 91 |
- Andreas Naive, |
|
| 92 |
- John Weidman |
|
| 93 |
- |
|
| 94 |
- S-RTC C emulator code |
|
| 95 |
- (c) Copyright 2001 - 2006 byuu, |
|
| 96 |
- John Weidman |
|
| 97 |
- |
|
| 98 |
- ST010 C++ emulator code |
|
| 99 |
- (c) Copyright 2003 Feather, |
|
| 100 |
- John Weidman, |
|
| 101 |
- Kris Bleakley, |
|
| 102 |
- Matthew Kendora |
|
| 103 |
- |
|
| 104 |
- Super FX x86 assembler emulator code |
|
| 105 |
- (c) Copyright 1998 - 2003 _Demo_, |
|
| 106 |
- pagefault, |
|
| 107 |
- zsKnight |
|
| 108 |
- |
|
| 109 |
- Super FX C emulator code |
|
| 110 |
- (c) Copyright 1997 - 1999 Ivar, |
|
| 111 |
- Gary Henderson, |
|
| 112 |
- John Weidman |
|
| 113 |
- |
|
| 114 |
- Sound emulator code used in 1.5-1.51 |
|
| 115 |
- (c) Copyright 1998 - 2003 Brad Martin |
|
| 116 |
- (c) Copyright 1998 - 2006 Charles Bilyue' |
|
| 117 |
- |
|
| 118 |
- Sound emulator code used in 1.52+ |
|
| 119 |
- (c) Copyright 2004 - 2007 Shay Green (gblargg@gmail.com) |
|
| 120 |
- |
|
| 121 |
- SH assembler code partly based on x86 assembler code |
|
| 122 |
- (c) Copyright 2002 - 2004 Marcus Comstedt (marcus@mc.pp.se) |
|
| 123 |
- |
|
| 124 |
- 2xSaI filter |
|
| 125 |
- (c) Copyright 1999 - 2001 Derek Liauw Kie Fa |
|
| 126 |
- |
|
| 127 |
- HQ2x, HQ3x, HQ4x filters |
|
| 128 |
- (c) Copyright 2003 Maxim Stepin (maxim@hiend3d.com) |
|
| 129 |
- |
|
| 130 |
- NTSC filter |
|
| 131 |
- (c) Copyright 2006 - 2007 Shay Green |
|
| 132 |
- |
|
| 133 |
- GTK+ GUI code |
|
| 134 |
- (c) Copyright 2004 - 2011 BearOso |
|
| 135 |
- |
|
| 136 |
- Win32 GUI code |
|
| 137 |
- (c) Copyright 2003 - 2006 blip, |
|
| 138 |
- funkyass, |
|
| 139 |
- Matthew Kendora, |
|
| 140 |
- Nach, |
|
| 141 |
- nitsuja |
|
| 142 |
- (c) Copyright 2009 - 2011 OV2 |
|
| 143 |
- |
|
| 144 |
- Mac OS GUI code |
|
| 145 |
- (c) Copyright 1998 - 2001 John Stiles |
|
| 146 |
- (c) Copyright 2001 - 2011 zones |
|
| 147 |
- |
|
| 148 |
- |
|
| 149 |
- Specific ports contains the works of other authors. See headers in |
|
| 150 |
- individual files. |
|
| 151 |
- |
|
| 152 |
- |
|
| 153 |
- Snes9x homepage: http://www.snes9x.com/ |
|
| 154 |
- |
|
| 155 |
- Permission to use, copy, modify and/or distribute Snes9x in both binary |
|
| 156 |
- and source form, for non-commercial purposes, is hereby granted without |
|
| 157 |
- fee, providing that this license information and copyright notice appear |
|
| 158 |
- with all copies and any derived work. |
|
| 159 |
- |
|
| 160 |
- This software is provided 'as-is', without any express or implied |
|
| 161 |
- warranty. In no event shall the authors be held liable for any damages |
|
| 162 |
- arising from the use of this software or it's derivatives. |
|
| 163 |
- |
|
| 164 |
- Snes9x is freeware for PERSONAL USE only. Commercial users should |
|
| 165 |
- seek permission of the copyright holders first. Commercial use includes, |
|
| 166 |
- but is not limited to, charging money for Snes9x or software derived from |
|
| 167 |
- Snes9x, including Snes9x or derivatives in commercial game bundles, and/or |
|
| 168 |
- using Snes9x as a promotion for your commercial product. |
|
| 169 |
- |
|
| 170 |
- The copyright holders request that bug fixes and improvements to the code |
|
| 171 |
- should be forwarded to them so everyone can benefit from the modifications |
|
| 172 |
- in future versions. |
|
| 173 |
- |
|
| 174 |
- Super NES and Super Nintendo Entertainment System are trademarks of |
|
| 175 |
- Nintendo Co., Limited and its subsidiary companies. |
|
| 176 |
- ***********************************************************************************/ |
|
| 3 |
+ This file is licensed under the Snes9x License. |
|
| 4 |
+ For further information, consult the LICENSE file in the root directory. |
|
| 5 |
+\*****************************************************************************/ |
|
| 177 | 6 |
|
| 178 | 7 |
#pragma once |
| 179 | 8 |
|
| ... | ... |
@@ -291,57 +120,39 @@ inline void ADC16(uint16_t Work16) |
| 291 | 120 |
{
|
| 292 | 121 |
if (CheckDecimal()) |
| 293 | 122 |
{
|
| 294 |
- uint16_t A1 = Registers.A.W & 0x000F; |
|
| 295 |
- uint16_t A2 = Registers.A.W & 0x00F0; |
|
| 296 |
- uint16_t A3 = Registers.A.W & 0x0F00; |
|
| 297 |
- uint32_t A4 = Registers.A.W & 0xF000; |
|
| 298 |
- uint16_t W1 = Work16 & 0x000F; |
|
| 299 |
- uint16_t W2 = Work16 & 0x00F0; |
|
| 300 |
- uint16_t W3 = Work16 & 0x0F00; |
|
| 301 |
- uint16_t W4 = Work16 & 0xF000; |
|
| 302 |
- |
|
| 303 |
- A1 += W1 + CheckCarry(); |
|
| 304 |
- if (A1 > 0x0009) |
|
| 305 |
- {
|
|
| 306 |
- A1 -= 0x000A; |
|
| 307 |
- A1 &= 0x000F; |
|
| 308 |
- A2 += 0x0010; |
|
| 309 |
- } |
|
| 310 |
- |
|
| 311 |
- A2 += W2; |
|
| 312 |
- if (A2 > 0x0090) |
|
| 313 |
- {
|
|
| 314 |
- A2 -= 0x00A0; |
|
| 315 |
- A2 &= 0x00F0; |
|
| 316 |
- A3 += 0x0100; |
|
| 317 |
- } |
|
| 318 |
- |
|
| 319 |
- A3 += W3; |
|
| 320 |
- if (A3 > 0x0900) |
|
| 321 |
- {
|
|
| 322 |
- A3 -= 0x0A00; |
|
| 323 |
- A3 &= 0x0F00; |
|
| 324 |
- A4 += 0x1000; |
|
| 325 |
- } |
|
| 326 |
- |
|
| 327 |
- A4 += W4; |
|
| 328 |
- if (A4 > 0x9000) |
|
| 329 |
- {
|
|
| 330 |
- A4 -= 0xA000; |
|
| 331 |
- A4 &= 0xF000; |
|
| 332 |
- SetCarry(); |
|
| 333 |
- } |
|
| 334 |
- else |
|
| 335 |
- ClearCarry(); |
|
| 123 |
+ uint32_t carry = CheckCarry(); |
|
| 124 |
+ |
|
| 125 |
+ uint32_t result = (Registers.A.W & 0x000F) + (Work16 & 0x000F) + carry; |
|
| 126 |
+ if (result > 0x0009) |
|
| 127 |
+ result += 0x0006; |
|
| 128 |
+ carry = result > 0x000F; |
|
| 129 |
+ |
|
| 130 |
+ result = (Registers.A.W & 0x00F0) + (Work16 & 0x00F0) + (result & 0x000F) + carry * 0x10; |
|
| 131 |
+ if (result > 0x009F) |
|
| 132 |
+ result += 0x0060; |
|
| 133 |
+ carry = result > 0x00FF; |
|
| 336 | 134 |
|
| 337 |
- uint16_t Ans16 = A4 | A3 | A2 | A1; |
|
| 135 |
+ result = (Registers.A.W & 0x0F00) + (Work16 & 0x0F00) + (result & 0x00FF) + carry * 0x100; |
|
| 136 |
+ if (result > 0x09FF) |
|
| 137 |
+ result += 0x0600; |
|
| 138 |
+ carry = result > 0x0FFF; |
|
| 338 | 139 |
|
| 339 |
- if (~(Registers.A.W ^ Work16) & (Work16 ^ Ans16) & 0x8000) |
|
| 140 |
+ result = (Registers.A.W & 0xF000) + (Work16 & 0xF000) + (result & 0x0FFF) + carry * 0x1000; |
|
| 141 |
+ |
|
| 142 |
+ if ((Registers.A.W & 0x8000) == (Work16 & 0x8000) && (Registers.A.W & 0x8000) != (result & 0x8000)) |
|
| 340 | 143 |
SetOverflow(); |
| 341 | 144 |
else |
| 342 | 145 |
ClearOverflow(); |
| 343 | 146 |
|
| 344 |
- Registers.A.W = Ans16; |
|
| 147 |
+ if (result > 0x9FFF) |
|
| 148 |
+ result += 0x6000; |
|
| 149 |
+ |
|
| 150 |
+ if (result > 0xFFFF) |
|
| 151 |
+ SetCarry(); |
|
| 152 |
+ else |
|
| 153 |
+ ClearCarry(); |
|
| 154 |
+ |
|
| 155 |
+ Registers.A.W = result & 0xFFFF; |
|
| 345 | 156 |
SetZN(Registers.A.W); |
| 346 | 157 |
} |
| 347 | 158 |
else |
| ... | ... |
@@ -364,37 +175,29 @@ inline void ADC8(uint8_t Work8) |
| 364 | 175 |
{
|
| 365 | 176 |
if (CheckDecimal()) |
| 366 | 177 |
{
|
| 367 |
- uint8_t A1 = Registers.A.W & 0x0F; |
|
| 368 |
- uint16_t A2 = Registers.A.W & 0xF0; |
|
| 369 |
- uint8_t W1 = Work8 & 0x0F; |
|
| 370 |
- uint8_t W2 = Work8 & 0xF0; |
|
| 371 |
- |
|
| 372 |
- A1 += W1 + CheckCarry(); |
|
| 373 |
- if (A1 > 0x09) |
|
| 374 |
- {
|
|
| 375 |
- A1 -= 0x0A; |
|
| 376 |
- A1 &= 0x0F; |
|
| 377 |
- A2 += 0x10; |
|
| 378 |
- } |
|
| 379 |
- |
|
| 380 |
- A2 += W2; |
|
| 381 |
- if (A2 > 0x90) |
|
| 382 |
- {
|
|
| 383 |
- A2 -= 0xA0; |
|
| 384 |
- A2 &= 0xF0; |
|
| 385 |
- SetCarry(); |
|
| 386 |
- } |
|
| 387 |
- else |
|
| 388 |
- ClearCarry(); |
|
| 178 |
+ uint32_t carry = CheckCarry(); |
|
| 389 | 179 |
|
| 390 |
- uint8_t Ans8 = A2 | A1; |
|
| 180 |
+ uint32_t result = (Registers.A.B.l & 0x0F) + (Work8 & 0x0F) + carry; |
|
| 181 |
+ if (result > 0x09) |
|
| 182 |
+ result += 0x06; |
|
| 183 |
+ carry = result > 0x0F; |
|
| 391 | 184 |
|
| 392 |
- if (~(Registers.A.B.l ^ Work8) & (Work8 ^ Ans8) & 0x80) |
|
| 185 |
+ result = (Registers.A.B.l & 0xF0) + (Work8 & 0xF0) + (result & 0x0F) + (carry * 0x10); |
|
| 186 |
+ |
|
| 187 |
+ if ((Registers.A.B.l & 0x80) == (Work8 & 0x80) && (Registers.A.B.l & 0x80) != (result & 0x80)) |
|
| 393 | 188 |
SetOverflow(); |
| 394 | 189 |
else |
| 395 | 190 |
ClearOverflow(); |
| 396 | 191 |
|
| 397 |
- Registers.A.B.l = Ans8; |
|
| 192 |
+ if (result > 0x9F) |
|
| 193 |
+ result += 0x60; |
|
| 194 |
+ |
|
| 195 |
+ if (result > 0xFF) |
|
| 196 |
+ SetCarry(); |
|
| 197 |
+ else |
|
| 198 |
+ ClearCarry(); |
|
| 199 |
+ |
|
| 200 |
+ Registers.A.B.l = result & 0xFF; |
|
| 398 | 201 |
SetZN(Registers.A.B.l); |
| 399 | 202 |
} |
| 400 | 203 |
else |
| ... | ... |
@@ -667,58 +470,41 @@ inline void SBC16(uint16_t Work16) |
| 667 | 470 |
{
|
| 668 | 471 |
if (CheckDecimal()) |
| 669 | 472 |
{
|
| 670 |
- uint16_t A1 = Registers.A.W & 0x000F; |
|
| 671 |
- uint16_t A2 = Registers.A.W & 0x00F0; |
|
| 672 |
- uint16_t A3 = Registers.A.W & 0x0F00; |
|
| 673 |
- uint32_t A4 = Registers.A.W & 0xF000; |
|
| 674 |
- uint16_t W1 = Work16 & 0x000F; |
|
| 675 |
- uint16_t W2 = Work16 & 0x00F0; |
|
| 676 |
- uint16_t W3 = Work16 & 0x0F00; |
|
| 677 |
- uint16_t W4 = Work16 & 0xF000; |
|
| 678 |
- |
|
| 679 |
- A1 -= W1 + !CheckCarry(); |
|
| 680 |
- A2 -= W2; |
|
| 681 |
- A3 -= W3; |
|
| 682 |
- A4 -= W4; |
|
| 683 |
- |
|
| 684 |
- if (A1 > 0x000F) |
|
| 685 |
- {
|
|
| 686 |
- A1 += 0x000A; |
|
| 687 |
- A1 &= 0x000F; |
|
| 688 |
- A2 -= 0x0010; |
|
| 689 |
- } |
|
| 690 |
- |
|
| 691 |
- if (A2 > 0x00F0) |
|
| 692 |
- {
|
|
| 693 |
- A2 += 0x00A0; |
|
| 694 |
- A2 &= 0x00F0; |
|
| 695 |
- A3 -= 0x0100; |
|
| 696 |
- } |
|
| 697 |
- |
|
| 698 |
- if (A3 > 0x0F00) |
|
| 699 |
- {
|
|
| 700 |
- A3 += 0x0A00; |
|
| 701 |
- A3 &= 0x0F00; |
|
| 702 |
- A4 -= 0x1000; |
|
| 703 |
- } |
|
| 704 |
- |
|
| 705 |
- if (A4 > 0xF000) |
|
| 706 |
- {
|
|
| 707 |
- A4 += 0xA000; |
|
| 708 |
- A4 &= 0xF000; |
|
| 709 |
- ClearCarry(); |
|
| 710 |
- } |
|
| 711 |
- else |
|
| 712 |
- SetCarry(); |
|
| 473 |
+ int carry = CheckCarry(); |
|
| 474 |
+ |
|
| 475 |
+ Work16 ^= 0xFFFF; |
|
| 476 |
+ |
|
| 477 |
+ int result = (Registers.A.W & 0x000F) + (Work16 & 0x000F) + carry; |
|
| 478 |
+ if (result < 0x0010) |
|
| 479 |
+ result -= 0x0006; |
|
| 480 |
+ carry = result > 0x000F; |
|
| 481 |
+ |
|
| 482 |
+ result = (Registers.A.W & 0x00F0) + (Work16 & 0x00F0) + (result & 0x000F) + carry * 0x10; |
|
| 483 |
+ if (result < 0x0100) |
|
| 484 |
+ result -= 0x0060; |
|
| 485 |
+ carry = result > 0x00FF; |
|
| 713 | 486 |
|
| 714 |
- uint16_t Ans16 = A4 | A3 | A2 | A1; |
|
| 487 |
+ result = (Registers.A.W & 0x0F00) + (Work16 & 0x0F00) + (result & 0x00FF) + carry * 0x100; |
|
| 488 |
+ if (result < 0x1000) |
|
| 489 |
+ result -= 0x0600; |
|
| 490 |
+ carry = result > 0x0FFF; |
|
| 715 | 491 |
|
| 716 |
- if ((Registers.A.W ^ Work16) & (Registers.A.W ^ Ans16) & 0x8000) |
|
| 492 |
+ result = (Registers.A.W & 0xF000) + (Work16 & 0xF000) + (result & 0x0FFF) + carry * 0x1000; |
|
| 493 |
+ |
|
| 494 |
+ if (!((Registers.A.W ^ Work16) & 0x8000) && ((Registers.A.W ^ result) & 0x8000)) |
|
| 717 | 495 |
SetOverflow(); |
| 718 | 496 |
else |
| 719 | 497 |
ClearOverflow(); |
| 720 | 498 |
|
| 721 |
- Registers.A.W = Ans16; |
|
| 499 |
+ if (result < 0x10000) |
|
| 500 |
+ result -= 0x6000; |
|
| 501 |
+ |
|
| 502 |
+ if (result > 0xFFFF) |
|
| 503 |
+ SetCarry(); |
|
| 504 |
+ else |
|
| 505 |
+ ClearCarry(); |
|
| 506 |
+ |
|
| 507 |
+ Registers.A.W = result & 0xFFFF; |
|
| 722 | 508 |
SetZN(Registers.A.W); |
| 723 | 509 |
} |
| 724 | 510 |
else |
| ... | ... |
@@ -741,38 +527,31 @@ inline void SBC8(uint8_t Work8) |
| 741 | 527 |
{
|
| 742 | 528 |
if (CheckDecimal()) |
| 743 | 529 |
{
|
| 744 |
- uint8_t A1 = Registers.A.W & 0x0F; |
|
| 745 |
- uint16_t A2 = Registers.A.W & 0xF0; |
|
| 746 |
- uint8_t W1 = Work8 & 0x0F; |
|
| 747 |
- uint8_t W2 = Work8 & 0xF0; |
|
| 748 |
- |
|
| 749 |
- A1 -= W1 + !CheckCarry(); |
|
| 750 |
- A2 -= W2; |
|
| 751 |
- |
|
| 752 |
- if (A1 > 0x0F) |
|
| 753 |
- {
|
|
| 754 |
- A1 += 0x0A; |
|
| 755 |
- A1 &= 0x0F; |
|
| 756 |
- A2 -= 0x10; |
|
| 757 |
- } |
|
| 758 |
- |
|
| 759 |
- if (A2 > 0xF0) |
|
| 760 |
- {
|
|
| 761 |
- A2 += 0xA0; |
|
| 762 |
- A2 &= 0xF0; |
|
| 763 |
- ClearCarry(); |
|
| 764 |
- } |
|
| 765 |
- else |
|
| 766 |
- SetCarry(); |
|
| 530 |
+ int carry = CheckCarry(); |
|
| 531 |
+ |
|
| 532 |
+ Work8 ^= 0xFF; |
|
| 767 | 533 |
|
| 768 |
- uint8_t Ans8 = A2 | A1; |
|
| 534 |
+ int result = (Registers.A.B.l & 0x0F) + (Work8 & 0x0F) + carry; |
|
| 535 |
+ if (result < 0x10) |
|
| 536 |
+ result -= 0x06; |
|
| 537 |
+ carry = (result > 0x0F); |
|
| 769 | 538 |
|
| 770 |
- if ((Registers.A.B.l ^ Work8) & (Registers.A.B.l ^ Ans8) & 0x80) |
|
| 539 |
+ result = (Registers.A.B.l & 0xF0) + (Work8 & 0xF0) + (result & 0x0F) + carry * 0x10; |
|
| 540 |
+ |
|
| 541 |
+ if ((Registers.A.B.l & 0x80) == (Work8 & 0x80) && (Registers.A.B.l & 0x80) != (result & 0x80)) |
|
| 771 | 542 |
SetOverflow(); |
| 772 | 543 |
else |
| 773 | 544 |
ClearOverflow(); |
| 774 | 545 |
|
| 775 |
- Registers.A.B.l = Ans8; |
|
| 546 |
+ if (result < 0x100) |
|
| 547 |
+ result -= 0x60; |
|
| 548 |
+ |
|
| 549 |
+ if (result > 0xFF) |
|
| 550 |
+ SetCarry(); |
|
| 551 |
+ else |
|
| 552 |
+ ClearCarry(); |
|
| 553 |
+ |
|
| 554 |
+ Registers.A.B.l = result & 0xFF; |
|
| 776 | 555 |
SetZN(Registers.A.B.l); |
| 777 | 556 |
} |
| 778 | 557 |
else |
| ... | ... |
@@ -175,8 +175,7 @@ |
| 175 | 175 |
Nintendo Co., Limited and its subsidiary companies. |
| 176 | 176 |
***********************************************************************************/ |
| 177 | 177 |
|
| 178 |
-#ifndef _CPUMACRO_H_ |
|
| 179 |
-#define _CPUMACRO_H_ |
|
| 178 |
+#pragma once |
|
| 180 | 179 |
|
| 181 | 180 |
template<typename Fa, typename Ff> inline void rOP8(Fa addr, Ff func) |
| 182 | 181 |
{
|
| ... | ... |
@@ -879,5 +878,3 @@ inline void TSB8(uint32_t OpAddress) |
| 879 | 878 |
S9xSetByte(Work8, OpAddress); |
| 880 | 879 |
OpenBus = Work8; |
| 881 | 880 |
} |
| 882 |
- |
|
| 883 |
-#endif |
| ... | ... |
@@ -175,140 +175,131 @@ |
| 175 | 175 |
Nintendo Co., Limited and its subsidiary companies. |
| 176 | 176 |
***********************************************************************************/ |
| 177 | 177 |
|
| 178 |
- |
|
| 179 | 178 |
#ifndef _CPUMACRO_H_ |
| 180 | 179 |
#define _CPUMACRO_H_ |
| 181 | 180 |
|
| 182 |
-#define rOP8(OP, ADDR, WRAP, FUNC) \ |
|
| 183 |
-static void Op##OP() \ |
|
| 184 |
-{ \
|
|
| 185 |
- uint8_t val = OpenBus = S9xGetByte(ADDR(READ)); \ |
|
| 186 |
- FUNC(val); \ |
|
| 181 |
+template<typename Fa, typename Ff> inline void rOP8(Fa addr, Ff func) |
|
| 182 |
+{
|
|
| 183 |
+ uint8_t val = OpenBus = S9xGetByte(addr(READ)); |
|
| 184 |
+ func(val); |
|
| 187 | 185 |
} |
| 188 | 186 |
|
| 189 |
-#define rOP16(OP, ADDR, WRAP, FUNC) \ |
|
| 190 |
-static void Op##OP() \ |
|
| 191 |
-{ \
|
|
| 192 |
- uint16_t val = S9xGetWord(ADDR(READ), WRAP); \ |
|
| 193 |
- OpenBus = (uint8_t) (val >> 8); \ |
|
| 194 |
- FUNC(val); \ |
|
| 187 |
+template<typename Fa, typename Ff> inline void rOP16(Fa addr, Ff func, s9xwrap_t wrap = WRAP_NONE) |
|
| 188 |
+{
|
|
| 189 |
+ uint16_t val = S9xGetWord(addr(READ), wrap); |
|
| 190 |
+ OpenBus = static_cast<uint8_t>(val >> 8); |
|
| 191 |
+ func(val); |
|
| 195 | 192 |
} |
| 196 | 193 |
|
| 197 |
-#define rOPC(OP, COND, ADDR, WRAP, FUNC) \ |
|
| 198 |
-static void Op##OP() \ |
|
| 199 |
-{ \
|
|
| 200 |
- if (Check##COND()) \ |
|
| 201 |
- { \
|
|
| 202 |
- uint8_t val = OpenBus = S9xGetByte(ADDR(READ)); \ |
|
| 203 |
- FUNC(val); \ |
|
| 204 |
- } \ |
|
| 205 |
- else \ |
|
| 206 |
- { \
|
|
| 207 |
- uint16_t val = S9xGetWord(ADDR(READ), WRAP); \ |
|
| 208 |
- OpenBus = (uint8_t) (val >> 8); \ |
|
| 209 |
- FUNC(val); \ |
|
| 210 |
- } \ |
|
| 194 |
+template<typename Fa, typename Ff8, typename Ff16> inline void rOPC(bool cond, Fa addr, Ff8 func8, Ff16 func16, s9xwrap_t wrap = WRAP_NONE) |
|
| 195 |
+{
|
|
| 196 |
+ if (cond) |
|
| 197 |
+ rOP8(addr, func8); |
|
| 198 |
+ else |
|
| 199 |
+ rOP16(addr, func16, wrap); |
|
| 211 | 200 |
} |
| 212 | 201 |
|
| 213 |
-#define rOPM(OP, ADDR, WRAP, FUNC) \ |
|
| 214 |
-rOPC(OP, Memory, ADDR, WRAP, FUNC) |
|
| 215 |
- |
|
| 216 |
-#define rOPX(OP, ADDR, WRAP, FUNC) \ |
|
| 217 |
-rOPC(OP, Index, ADDR, WRAP, FUNC) |
|
| 202 |
+template<typename Fa, typename Ff8, typename Ff16> inline void rOPM(Fa addr, Ff8 func8, Ff16 func16, s9xwrap_t wrap = WRAP_NONE) |
|
| 203 |
+{
|
|
| 204 |
+ rOPC(CheckMemory(), addr, func8, func16, wrap); |
|
| 205 |
+} |
|
| 218 | 206 |
|
| 219 |
-#define wOP8(OP, ADDR, WRAP, FUNC) \ |
|
| 220 |
-static void Op##OP() \ |
|
| 221 |
-{ \
|
|
| 222 |
- FUNC##8(ADDR(WRITE)); \ |
|
| 207 |
+template<typename Fa, typename Ff8, typename Ff16> inline void rOPX(Fa addr, Ff8 func8, Ff16 func16, s9xwrap_t wrap = WRAP_NONE) |
|
| 208 |
+{
|
|
| 209 |
+ rOPC(CheckIndex(), addr, func8, func16, wrap); |
|
| 223 | 210 |
} |
| 224 | 211 |
|
| 225 |
-#define wOP16(OP, ADDR, WRAP, FUNC) \ |
|
| 226 |
-static void Op##OP() \ |
|
| 227 |
-{ \
|
|
| 228 |
- FUNC##16(ADDR(WRITE), WRAP); \ |
|
| 212 |
+template<typename Fa, typename Ff> inline void wOP8(Fa addr, Ff func) |
|
| 213 |
+{
|
|
| 214 |
+ func(addr(WRITE)); |
|
| 229 | 215 |
} |
| 230 | 216 |
|
| 231 |
-#define wOPC(OP, COND, ADDR, WRAP, FUNC) \ |
|
| 232 |
-static void Op##OP() \ |
|
| 233 |
-{ \
|
|
| 234 |
- if (Check##COND()) \ |
|
| 235 |
- FUNC##8(ADDR(WRITE)); \ |
|
| 236 |
- else \ |
|
| 237 |
- FUNC##16(ADDR(WRITE), WRAP); \ |
|
| 217 |
+template<typename Fa, typename Ff> inline void wOP16(Fa addr, Ff func, s9xwrap_t wrap = WRAP_NONE) |
|
| 218 |
+{
|
|
| 219 |
+ func(addr(WRITE), wrap); |
|
| 238 | 220 |
} |
| 239 | 221 |
|
| 240 |
-#define wOPM(OP, ADDR, WRAP, FUNC) \ |
|
| 241 |
-wOPC(OP, Memory, ADDR, WRAP, FUNC) |
|
| 222 |
+template<typename Fa, typename Ff8, typename Ff16> inline void wOPC(bool cond, Fa addr, Ff8 func8, Ff16 func16, s9xwrap_t wrap = WRAP_NONE) |
|
| 223 |
+{
|
|
| 224 |
+ if (cond) |
|
| 225 |
+ wOP8(addr, func8); |
|
| 226 |
+ else |
|
| 227 |
+ wOP16(addr, func16, wrap); |
|
| 228 |
+} |
|
| 242 | 229 |
|
| 243 |
-#define wOPX(OP, ADDR, WRAP, FUNC) \ |
|
| 244 |
-wOPC(OP, Index, ADDR, WRAP, FUNC) |
|
| 230 |
+template<typename Fa, typename Ff8, typename Ff16> inline void wOPM(Fa addr, Ff8 func8, Ff16 func16, s9xwrap_t wrap = WRAP_NONE) |
|
| 231 |
+{
|
|
| 232 |
+ wOPC(CheckMemory(), addr, func8, func16, wrap); |
|
| 233 |
+} |
|
| 245 | 234 |
|
| 246 |
-#define mOP8(OP, ADDR, WRAP, FUNC) \ |
|
| 247 |
-static void Op##OP() \ |
|
| 248 |
-{ \
|
|
| 249 |
- FUNC##8(ADDR(MODIFY)); \ |
|
| 235 |
+template<typename Fa, typename Ff8, typename Ff16> inline void wOPX(Fa addr, Ff8 func8, Ff16 func16, s9xwrap_t wrap = WRAP_NONE) |
|
| 236 |
+{
|
|
| 237 |
+ wOPC(CheckIndex(), addr, func8, func16, wrap); |
|
| 250 | 238 |
} |
| 251 | 239 |
|
| 252 |
-#define mOP16(OP, ADDR, WRAP, FUNC) \ |
|
| 253 |
-static void Op##OP() \ |
|
| 254 |
-{ \
|
|
| 255 |
- FUNC##16(ADDR(MODIFY), WRAP); \ |
|
| 240 |
+template<typename Fa, typename Ff> inline void mOP8(Fa addr, Ff func) |
|
| 241 |
+{
|
|
| 242 |
+ func(addr(MODIFY)); |
|
| 256 | 243 |
} |
| 257 | 244 |
|
| 258 |
-#define mOPC(OP, COND, ADDR, WRAP, FUNC) \ |
|
| 259 |
-static void Op##OP() \ |
|
| 260 |
-{ \
|
|
| 261 |
- if (Check##COND()) \ |
|
| 262 |
- FUNC##8(ADDR(MODIFY)); \ |
|
| 263 |
- else \ |
|
| 264 |
- FUNC##16(ADDR(MODIFY), WRAP); \ |
|
| 245 |
+template<typename Fa, typename Ff> inline void mOP16(Fa addr, Ff func, s9xwrap_t wrap = WRAP_NONE) |
|
| 246 |
+{
|
|
| 247 |
+ func(addr(MODIFY), wrap); |
|
| 265 | 248 |
} |
| 266 | 249 |
|
| 267 |
-#define mOPM(OP, ADDR, WRAP, FUNC) \ |
|
| 268 |
-mOPC(OP, Memory, ADDR, WRAP, FUNC) |
|
| 250 |
+template<typename Fa, typename Ff8, typename Ff16> inline void mOPC(bool cond, Fa addr, Ff8 func8, Ff16 func16, s9xwrap_t wrap = WRAP_NONE) |
|
| 251 |
+{
|
|
| 252 |
+ if (cond) |
|
| 253 |
+ mOP8(addr, func8); |
|
| 254 |
+ else |
|
| 255 |
+ mOP16(addr, func16, wrap); |
|
| 256 |
+} |
|
| 269 | 257 |
|
| 270 |
-#define bOP(OP, REL, COND, CHK, E) \ |
|
| 271 |
-static void Op##OP() \ |
|
| 272 |
-{ \
|
|
| 273 |
- pair newPC; \ |
|
| 274 |
- newPC.W = REL(JUMP); \ |
|
| 275 |
- if (COND) \ |
|
| 276 |
- { \
|
|
| 277 |
- AddCycles(ONE_CYCLE); \ |
|
| 278 |
- if (E && Registers.PCh != newPC.B.h) \ |
|
| 279 |
- AddCycles(ONE_CYCLE); \ |
|
| 280 |
- if ((Registers.PCw & ~MEMMAP_MASK) != (newPC.W & ~MEMMAP_MASK)) \ |
|
| 281 |
- S9xSetPCBase(ICPU.ShiftedPB + newPC.W); \ |
|
| 282 |
- else \ |
|
| 283 |
- Registers.PCw = newPC.W; \ |
|
| 284 |
- } \ |
|
| 258 |
+template<typename Fa, typename Ff8, typename Ff16> inline void mOPM(Fa addr, Ff8 func8, Ff16 func16, s9xwrap_t wrap = WRAP_NONE) |
|
| 259 |
+{
|
|
| 260 |
+ mOPC(CheckMemory(), addr, func8, func16, wrap); |
|
| 285 | 261 |
} |
| 286 | 262 |
|
| 263 |
+template<typename F> inline void bOP(F rel, bool cond, bool e) |
|
| 264 |
+{
|
|
| 265 |
+ pair newPC; |
|
| 266 |
+ newPC.W = rel(JUMP); |
|
| 267 |
+ if (cond) |
|
| 268 |
+ {
|
|
| 269 |
+ AddCycles(ONE_CYCLE); |
|
| 270 |
+ if (e && Registers.PC.B.xPCh != newPC.B.h) |
|
| 271 |
+ AddCycles(ONE_CYCLE); |
|
| 272 |
+ if ((Registers.PC.W.xPC & ~MEMMAP_MASK) != (newPC.W & ~MEMMAP_MASK)) |
|
| 273 |
+ S9xSetPCBase(ICPU.ShiftedPB + newPC.W); |
|
| 274 |
+ else |
|
| 275 |
+ Registers.PC.W.xPC = newPC.W; |
|
| 276 |
+ } |
|
| 277 |
+} |
|
| 287 | 278 |
|
| 288 |
-static inline void SetZN (uint16_t Work16) |
|
| 279 |
+inline void SetZN(uint16_t Work16) |
|
| 289 | 280 |
{
|
| 290 |
- ICPU._Zero = Work16 != 0; |
|
| 291 |
- ICPU._Negative = (uint8_t) (Work16 >> 8); |
|
| 281 |
+ ICPU._Zero = !!Work16; |
|
| 282 |
+ ICPU._Negative = static_cast<uint8_t>(Work16 >> 8); |
|
| 292 | 283 |
} |
| 293 | 284 |
|
| 294 |
-static inline void SetZN (uint8_t Work8) |
|
| 285 |
+inline void SetZN(uint8_t Work8) |
|
| 295 | 286 |
{
|
| 296 | 287 |
ICPU._Zero = Work8; |
| 297 | 288 |
ICPU._Negative = Work8; |
| 298 | 289 |
} |
| 299 | 290 |
|
| 300 |
-static inline void ADC (uint16_t Work16) |
|
| 291 |
+inline void ADC16(uint16_t Work16) |
|
| 301 | 292 |
{
|
| 302 | 293 |
if (CheckDecimal()) |
| 303 | 294 |
{
|
| 304 |
- uint16_t A1 = Registers.A.W & 0x000F; |
|
| 305 |
- uint16_t A2 = Registers.A.W & 0x00F0; |
|
| 306 |
- uint16_t A3 = Registers.A.W & 0x0F00; |
|
| 307 |
- uint32_t A4 = Registers.A.W & 0xF000; |
|
| 308 |
- uint16_t W1 = Work16 & 0x000F; |
|
| 309 |
- uint16_t W2 = Work16 & 0x00F0; |
|
| 310 |
- uint16_t W3 = Work16 & 0x0F00; |
|
| 311 |
- uint16_t W4 = Work16 & 0xF000; |
|
| 295 |
+ uint16_t A1 = Registers.A.W & 0x000F; |
|
| 296 |
+ uint16_t A2 = Registers.A.W & 0x00F0; |
|
| 297 |
+ uint16_t A3 = Registers.A.W & 0x0F00; |
|
| 298 |
+ uint32_t A4 = Registers.A.W & 0xF000; |
|
| 299 |
+ uint16_t W1 = Work16 & 0x000F; |
|
| 300 |
+ uint16_t W2 = Work16 & 0x00F0; |
|
| 301 |
+ uint16_t W3 = Work16 & 0x0F00; |
|
| 302 |
+ uint16_t W4 = Work16 & 0xF000; |
|
| 312 | 303 |
|
| 313 | 304 |
A1 += W1 + CheckCarry(); |
| 314 | 305 |
if (A1 > 0x0009) |
| ... | ... |
@@ -344,7 +335,7 @@ static inline void ADC (uint16_t Work16) |
| 344 | 335 |
else |
| 345 | 336 |
ClearCarry(); |
| 346 | 337 |
|
| 347 |
- uint16_t Ans16 = A4 | A3 | A2 | A1; |
|
| 338 |
+ uint16_t Ans16 = A4 | A3 | A2 | A1; |
|
| 348 | 339 |
|
| 349 | 340 |
if (~(Registers.A.W ^ Work16) & (Work16 ^ Ans16) & 0x8000) |
| 350 | 341 |
SetOverflow(); |
| ... | ... |
@@ -356,28 +347,28 @@ static inline void ADC (uint16_t Work16) |
| 356 | 347 |
} |
| 357 | 348 |
else |
| 358 | 349 |
{
|
| 359 |
- uint32_t Ans32 = Registers.A.W + Work16 + CheckCarry(); |
|
| 350 |
+ uint32_t Ans32 = Registers.A.W + Work16 + CheckCarry(); |
|
| 360 | 351 |
|
| 361 | 352 |
ICPU._Carry = Ans32 >= 0x10000; |
| 362 | 353 |
|
| 363 |
- if (~(Registers.A.W ^ Work16) & (Work16 ^ (uint16_t) Ans32) & 0x8000) |
|
| 354 |
+ if (~(Registers.A.W ^ Work16) & (Work16 ^ static_cast<uint16_t>(Ans32)) & 0x8000) |
|
| 364 | 355 |
SetOverflow(); |
| 365 | 356 |
else |
| 366 | 357 |
ClearOverflow(); |
| 367 | 358 |
|
| 368 |
- Registers.A.W = (uint16_t) Ans32; |
|
| 359 |
+ Registers.A.W = static_cast<uint16_t>(Ans32); |
|
| 369 | 360 |
SetZN(Registers.A.W); |
| 370 | 361 |
} |
| 371 | 362 |
} |
| 372 | 363 |
|
| 373 |
-static inline void ADC (uint8_t Work8) |
|
| 364 |
+inline void ADC8(uint8_t Work8) |
|
| 374 | 365 |
{
|
| 375 | 366 |
if (CheckDecimal()) |
| 376 | 367 |
{
|
| 377 |
- uint8_t A1 = Registers.A.W & 0x0F; |
|
| 378 |
- uint16_t A2 = Registers.A.W & 0xF0; |
|
| 379 |
- uint8_t W1 = Work8 & 0x0F; |
|
| 380 |
- uint8_t W2 = Work8 & 0xF0; |
|
| 368 |
+ uint8_t A1 = Registers.A.W & 0x0F; |
|
| 369 |
+ uint16_t A2 = Registers.A.W & 0xF0; |
|
| 370 |
+ uint8_t W1 = Work8 & 0x0F; |
|
| 371 |
+ uint8_t W2 = Work8 & 0xF0; |
|
| 381 | 372 |
|
| 382 | 373 |
A1 += W1 + CheckCarry(); |
| 383 | 374 |
if (A1 > 0x09) |
| ... | ... |
@@ -397,48 +388,48 @@ static inline void ADC (uint8_t Work8) |
| 397 | 388 |
else |
| 398 | 389 |
ClearCarry(); |
| 399 | 390 |
|
| 400 |
- uint8_t Ans8 = A2 | A1; |
|
| 391 |
+ uint8_t Ans8 = A2 | A1; |
|
| 401 | 392 |
|
| 402 |
- if (~(Registers.AL ^ Work8) & (Work8 ^ Ans8) & 0x80) |
|
| 393 |
+ if (~(Registers.A.B.l ^ Work8) & (Work8 ^ Ans8) & 0x80) |
|
| 403 | 394 |
SetOverflow(); |
| 404 | 395 |
else |
| 405 | 396 |
ClearOverflow(); |
| 406 | 397 |
|
| 407 |
- Registers.AL = Ans8; |
|
| 408 |
- SetZN(Registers.AL); |
|
| 398 |
+ Registers.A.B.l = Ans8; |
|
| 399 |
+ SetZN(Registers.A.B.l); |
|
| 409 | 400 |
} |
| 410 | 401 |
else |
| 411 | 402 |
{
|
| 412 |
- uint16_t Ans16 = Registers.AL + Work8 + CheckCarry(); |
|
| 403 |
+ uint16_t Ans16 = Registers.A.B.l + Work8 + CheckCarry(); |
|
| 413 | 404 |
|
| 414 | 405 |
ICPU._Carry = Ans16 >= 0x100; |
| 415 | 406 |
|
| 416 |
- if (~(Registers.AL ^ Work8) & (Work8 ^ (uint8_t) Ans16) & 0x80) |
|
| 407 |
+ if (~(Registers.A.B.l ^ Work8) & (Work8 ^ static_cast<uint8_t>(Ans16)) & 0x80) |
|
| 417 | 408 |
SetOverflow(); |
| 418 | 409 |
else |
| 419 | 410 |
ClearOverflow(); |
| 420 | 411 |
|
| 421 |
- Registers.AL = (uint8_t) Ans16; |
|
| 422 |
- SetZN(Registers.AL); |
|
| 412 |
+ Registers.A.B.l = static_cast<uint8_t>(Ans16); |
|
| 413 |
+ SetZN(Registers.A.B.l); |
|
| 423 | 414 |
} |
| 424 | 415 |
} |
| 425 | 416 |
|
| 426 |
-static inline void AND (uint16_t Work16) |
|
| 417 |
+inline void AND16(uint16_t Work16) |
|
| 427 | 418 |
{
|
| 428 | 419 |
Registers.A.W &= Work16; |
| 429 | 420 |
SetZN(Registers.A.W); |
| 430 | 421 |
} |
| 431 | 422 |
|
| 432 |
-static inline void AND (uint8_t Work8) |
|
| 423 |
+inline void AND8(uint8_t Work8) |
|
| 433 | 424 |
{
|
| 434 |
- Registers.AL &= Work8; |
|
| 435 |
- SetZN(Registers.AL); |
|
| 425 |
+ Registers.A.B.l &= Work8; |
|
| 426 |
+ SetZN(Registers.A.B.l); |
|
| 436 | 427 |
} |
| 437 | 428 |
|
| 438 |
-static inline void ASL16 (uint32_t OpAddress, s9xwrap_t w) |
|
| 429 |
+inline void ASL16(uint32_t OpAddress, s9xwrap_t w) |
|
| 439 | 430 |
{
|
| 440 |
- uint16_t Work16 = S9xGetWord(OpAddress, w); |
|
| 441 |
- ICPU._Carry = (Work16 & 0x8000) != 0; |
|
| 431 |
+ uint16_t Work16 = S9xGetWord(OpAddress, w); |
|
| 432 |
+ ICPU._Carry = !!(Work16 & 0x8000); |
|
| 442 | 433 |
Work16 <<= 1; |
| 443 | 434 |
AddCycles(ONE_CYCLE); |
| 444 | 435 |
S9xSetWord(Work16, OpAddress, w, WRITE_10); |
| ... | ... |
@@ -446,10 +437,10 @@ static inline void ASL16 (uint32_t OpAddress, s9xwrap_t w) |
| 446 | 437 |
SetZN(Work16); |
| 447 | 438 |
} |
| 448 | 439 |
|
| 449 |
-static inline void ASL8 (uint32_t OpAddress) |
|
| 440 |
+inline void ASL8(uint32_t OpAddress) |
|
| 450 | 441 |
{
|
| 451 |
- uint8_t Work8 = S9xGetByte(OpAddress); |
|
| 452 |
- ICPU._Carry = (Work8 & 0x80) != 0; |
|
| 442 |
+ uint8_t Work8 = S9xGetByte(OpAddress); |
|
| 443 |
+ ICPU._Carry = !!(Work8 & 0x80); |
|
| 453 | 444 |
Work8 <<= 1; |
| 454 | 445 |
AddCycles(ONE_CYCLE); |
| 455 | 446 |
S9xSetByte(Work8, OpAddress); |
| ... | ... |
@@ -457,149 +448,149 @@ static inline void ASL8 (uint32_t OpAddress) |
| 457 | 448 |
SetZN(Work8); |
| 458 | 449 |
} |
| 459 | 450 |
|
| 460 |
-static inline void BIT (uint16_t Work16) |
|
| 451 |
+inline void BIT16(uint16_t Work16) |
|
| 461 | 452 |
{
|
| 462 |
- ICPU._Overflow = (Work16 & 0x4000) != 0; |
|
| 463 |
- ICPU._Negative = (uint8_t) (Work16 >> 8); |
|
| 464 |
- ICPU._Zero = (Work16 & Registers.A.W) != 0; |
|
| 453 |
+ ICPU._Overflow = !!(Work16 & 0x4000); |
|
| 454 |
+ ICPU._Negative = static_cast<uint8_t>(Work16 >> 8); |
|
| 455 |
+ ICPU._Zero = !!(Work16 & Registers.A.W); |
|
| 465 | 456 |
} |
| 466 | 457 |
|
| 467 |
-static inline void BIT (uint8_t Work8) |
|
| 458 |
+inline void BIT8(uint8_t Work8) |
|
| 468 | 459 |
{
|
| 469 |
- ICPU._Overflow = (Work8 & 0x40) != 0; |
|
| 460 |
+ ICPU._Overflow = !!(Work8 & 0x40); |
|
| 470 | 461 |
ICPU._Negative = Work8; |
| 471 |
- ICPU._Zero = Work8 & Registers.AL; |
|
| 462 |
+ ICPU._Zero = !!(Work8 & Registers.A.B.l); |
|
| 472 | 463 |
} |
| 473 | 464 |
|
| 474 |
-static inline void CMP (uint16_t val) |
|
| 465 |
+inline void CMP16(uint16_t val) |
|
| 475 | 466 |
{
|
| 476 |
- int32_t Int32 = (int32_t) Registers.A.W - (int32_t) val; |
|
| 467 |
+ int32_t Int32 = static_cast<int32_t>(Registers.A.W) - static_cast<int32_t>(val); |
|
| 477 | 468 |
ICPU._Carry = Int32 >= 0; |
| 478 |
- SetZN((uint16_t) Int32); |
|
| 469 |
+ SetZN(static_cast<uint16_t>(Int32)); |
|
| 479 | 470 |
} |
| 480 | 471 |
|
| 481 |
-static inline void CMP (uint8_t val) |
|
| 472 |
+inline void CMP8(uint8_t val) |
|
| 482 | 473 |
{
|
| 483 |
- int16_t Int16 = (int16_t) Registers.AL - (int16_t) val; |
|
| 474 |
+ int16_t Int16 = static_cast<int16_t>(Registers.A.B.l) - static_cast<int16_t>(val); |
|
| 484 | 475 |
ICPU._Carry = Int16 >= 0; |
| 485 |
- SetZN((uint8_t) Int16); |
|
| 476 |
+ SetZN(static_cast<uint8_t>(Int16)); |
|
| 486 | 477 |
} |
| 487 | 478 |
|
| 488 |
-static inline void CPX (uint16_t val) |
|
| 479 |
+inline void CPX16(uint16_t val) |
|
| 489 | 480 |
{
|
| 490 |
- int32_t Int32 = (int32_t) Registers.X.W - (int32_t) val; |
|
| 481 |
+ int32_t Int32 = static_cast<int32_t>(Registers.X.W) - static_cast<int32_t>(val); |
|
| 491 | 482 |
ICPU._Carry = Int32 >= 0; |
| 492 |
- SetZN((uint16_t) Int32); |
|
| 483 |
+ SetZN(static_cast<uint16_t>(Int32)); |
|
| 493 | 484 |
} |
| 494 | 485 |
|
| 495 |
-static inline void CPX (uint8_t val) |
|
| 486 |
+inline void CPX8(uint8_t val) |
|
| 496 | 487 |
{
|
| 497 |
- int16_t Int16 = (int16_t) Registers.XL - (int16_t) val; |
|
| 488 |
+ int16_t Int16 = static_cast<int16_t>(Registers.X.B.l) - static_cast<int16_t>(val); |
|
| 498 | 489 |
ICPU._Carry = Int16 >= 0; |
| 499 |
- SetZN((uint8_t) Int16); |
|
| 490 |
+ SetZN(static_cast<uint8_t>(Int16)); |
|
| 500 | 491 |
} |
| 501 | 492 |
|
| 502 |
-static inline void CPY (uint16_t val) |
|
| 493 |
+inline void CPY16(uint16_t val) |
|
| 503 | 494 |
{
|
| 504 |
- int32_t Int32 = (int32_t) Registers.Y.W - (int32_t) val; |
|
| 495 |
+ int32_t Int32 = static_cast<int32_t>(Registers.Y.W) - static_cast<int32_t>(val); |
|
| 505 | 496 |
ICPU._Carry = Int32 >= 0; |
| 506 |
- SetZN((uint16_t) Int32); |
|
| 497 |
+ SetZN(static_cast<uint16_t>(Int32)); |
|
| 507 | 498 |
} |
| 508 | 499 |
|
| 509 |
-static inline void CPY (uint8_t val) |
|
| 500 |
+inline void CPY8(uint8_t val) |
|
| 510 | 501 |
{
|
| 511 |
- int16_t Int16 = (int16_t) Registers.YL - (int16_t) val; |
|
| 502 |
+ int16_t Int16 = static_cast<int16_t>(Registers.Y.B.l) - static_cast<int16_t>(val); |
|
| 512 | 503 |
ICPU._Carry = Int16 >= 0; |
| 513 |
- SetZN((uint8_t) Int16); |
|
| 504 |
+ SetZN(static_cast<uint8_t>(Int16)); |
|
| 514 | 505 |
} |
| 515 | 506 |
|
| 516 |
-static inline void DEC16 (uint32_t OpAddress, s9xwrap_t w) |
|
| 507 |
+inline void DEC16(uint32_t OpAddress, s9xwrap_t w) |
|
| 517 | 508 |
{
|
| 518 |
- uint16_t Work16 = S9xGetWord(OpAddress, w) - 1; |
|
| 509 |
+ uint16_t Work16 = S9xGetWord(OpAddress, w) - 1; |
|
| 519 | 510 |
AddCycles(ONE_CYCLE); |
| 520 | 511 |
S9xSetWord(Work16, OpAddress, w, WRITE_10); |
| 521 | 512 |
OpenBus = Work16 & 0xff; |
| 522 | 513 |
SetZN(Work16); |
| 523 | 514 |
} |
| 524 | 515 |
|
| 525 |
-static inline void DEC8 (uint32_t OpAddress) |
|
| 516 |
+inline void DEC8(uint32_t OpAddress) |
|
| 526 | 517 |
{
|
| 527 |
- uint8_t Work8 = S9xGetByte(OpAddress) - 1; |
|
| 518 |
+ uint8_t Work8 = S9xGetByte(OpAddress) - 1; |
|
| 528 | 519 |
AddCycles(ONE_CYCLE); |
| 529 | 520 |
S9xSetByte(Work8, OpAddress); |
| 530 | 521 |
OpenBus = Work8; |
| 531 | 522 |
SetZN(Work8); |
| 532 | 523 |
} |
| 533 | 524 |
|
| 534 |
-static inline void EOR (uint16_t val) |
|
| 525 |
+inline void EOR16(uint16_t val) |
|
| 535 | 526 |
{
|
| 536 | 527 |
Registers.A.W ^= val; |
| 537 | 528 |
SetZN(Registers.A.W); |
| 538 | 529 |
} |
| 539 | 530 |
|
| 540 |
-static inline void EOR (uint8_t val) |
|
| 531 |
+inline void EOR8(uint8_t val) |
|
| 541 | 532 |
{
|
| 542 |
- Registers.AL ^= val; |
|
| 543 |
- SetZN(Registers.AL); |
|
| 533 |
+ Registers.A.B.l ^= val; |
|
| 534 |
+ SetZN(Registers.A.B.l); |
|
| 544 | 535 |
} |
| 545 | 536 |
|
| 546 |
-static inline void INC16 (uint32_t OpAddress, s9xwrap_t w) |
|
| 537 |
+inline void INC16(uint32_t OpAddress, s9xwrap_t w) |
|
| 547 | 538 |
{
|
| 548 |
- uint16_t Work16 = S9xGetWord(OpAddress, w) + 1; |
|
| 539 |
+ uint16_t Work16 = S9xGetWord(OpAddress, w) + 1; |
|
| 549 | 540 |
AddCycles(ONE_CYCLE); |
| 550 | 541 |
S9xSetWord(Work16, OpAddress, w, WRITE_10); |
| 551 | 542 |
OpenBus = Work16 & 0xff; |
| 552 | 543 |
SetZN(Work16); |
| 553 | 544 |
} |
| 554 | 545 |
|
| 555 |
-static inline void INC8 (uint32_t OpAddress) |
|
| 546 |
+inline void INC8(uint32_t OpAddress) |
|
| 556 | 547 |
{
|
| 557 |
- uint8_t Work8 = S9xGetByte(OpAddress) + 1; |
|
| 548 |
+ uint8_t Work8 = S9xGetByte(OpAddress) + 1; |
|
| 558 | 549 |
AddCycles(ONE_CYCLE); |
| 559 | 550 |
S9xSetByte(Work8, OpAddress); |
| 560 | 551 |
OpenBus = Work8; |
| 561 | 552 |
SetZN(Work8); |
| 562 | 553 |
} |
| 563 | 554 |
|
| 564 |
-static inline void LDA (uint16_t val) |
|
| 555 |
+inline void LDA16(uint16_t val) |
|
| 565 | 556 |
{
|
| 566 | 557 |
Registers.A.W = val; |
| 567 | 558 |
SetZN(Registers.A.W); |
| 568 | 559 |
} |
| 569 | 560 |
|
| 570 |
-static inline void LDA (uint8_t val) |
|
| 561 |
+inline void LDA8(uint8_t val) |
|
| 571 | 562 |
{
|
| 572 |
- Registers.AL = val; |
|
| 573 |
- SetZN(Registers.AL); |
|
| 563 |
+ Registers.A.B.l = val; |
|
| 564 |
+ SetZN(Registers.A.B.l); |
|
| 574 | 565 |
} |
| 575 | 566 |
|
| 576 |
-static inline void LDX (uint16_t val) |
|
| 567 |
+inline void LDX16(uint16_t val) |
|
| 577 | 568 |
{
|
| 578 | 569 |
Registers.X.W = val; |
| 579 | 570 |
SetZN(Registers.X.W); |
| 580 | 571 |
} |
| 581 | 572 |
|
| 582 |
-static inline void LDX (uint8_t val) |
|
| 573 |
+inline void LDX8(uint8_t val) |
|
| 583 | 574 |
{
|
| 584 |
- Registers.XL = val; |
|
| 585 |
- SetZN(Registers.XL); |
|
| 575 |
+ Registers.X.B.l = val; |
|
| 576 |
+ SetZN(Registers.X.B.l); |
|
| 586 | 577 |
} |
| 587 | 578 |
|
| 588 |
-static inline void LDY (uint16_t val) |
|
| 579 |
+inline void LDY16(uint16_t val) |
|
| 589 | 580 |
{
|
| 590 | 581 |
Registers.Y.W = val; |
| 591 | 582 |
SetZN(Registers.Y.W); |
| 592 | 583 |
} |
| 593 | 584 |
|
| 594 |
-static inline void LDY (uint8_t val) |
|
| 585 |
+inline void LDY8(uint8_t val) |
|
| 595 | 586 |
{
|
| 596 |
- Registers.YL = val; |
|
| 597 |
- SetZN(Registers.YL); |
|
| 587 |
+ Registers.Y.B.l = val; |
|
| 588 |
+ SetZN(Registers.Y.B.l); |
|
| 598 | 589 |
} |
| 599 | 590 |
|
| 600 |
-static inline void LSR16 (uint32_t OpAddress, s9xwrap_t w) |
|
| 591 |
+inline void LSR16(uint32_t OpAddress, s9xwrap_t w) |
|
| 601 | 592 |
{
|
| 602 |
- uint16_t Work16 = S9xGetWord(OpAddress, w); |
|
| 593 |
+ uint16_t Work16 = S9xGetWord(OpAddress, w); |
|
| 603 | 594 |
ICPU._Carry = Work16 & 1; |
| 604 | 595 |
Work16 >>= 1; |
| 605 | 596 |
AddCycles(ONE_CYCLE); |
| ... | ... |
@@ -608,9 +599,9 @@ static inline void LSR16 (uint32_t OpAddress, s9xwrap_t w) |
| 608 | 599 |
SetZN(Work16); |
| 609 | 600 |
} |
| 610 | 601 |
|
| 611 |
-static inline void LSR8 (uint32_t OpAddress) |
|
| 602 |
+inline void LSR8(uint32_t OpAddress) |
|
| 612 | 603 |
{
|
| 613 |
- uint8_t Work8 = S9xGetByte(OpAddress); |
|
| 604 |
+ uint8_t Work8 = S9xGetByte(OpAddress); |
|
| 614 | 605 |
ICPU._Carry = Work8 & 1; |
| 615 | 606 |
Work8 >>= 1; |
| 616 | 607 |
AddCycles(ONE_CYCLE); |
| ... | ... |
@@ -619,72 +610,72 @@ static inline void LSR8 (uint32_t OpAddress) |
| 619 | 610 |
SetZN(Work8); |
| 620 | 611 |
} |
| 621 | 612 |
|
| 622 |
-static inline void ORA (uint16_t val) |
|
| 613 |
+inline void ORA16(uint16_t val) |
|
| 623 | 614 |
{
|
| 624 | 615 |
Registers.A.W |= val; |
| 625 | 616 |
SetZN(Registers.A.W); |
| 626 | 617 |
} |
| 627 | 618 |
|
| 628 |
-static inline void ORA (uint8_t val) |
|
| 619 |
+inline void ORA8(uint8_t val) |
|
| 629 | 620 |
{
|
| 630 |
- Registers.AL |= val; |
|
| 631 |
- SetZN(Registers.AL); |
|
| 621 |
+ Registers.A.B.l |= val; |
|
| 622 |
+ SetZN(Registers.A.B.l); |
|
| 632 | 623 |
} |
| 633 | 624 |
|
| 634 |
-static inline void ROL16 (uint32_t OpAddress, s9xwrap_t w) |
|
| 625 |
+inline void ROL16(uint32_t OpAddress, s9xwrap_t w) |
|
| 635 | 626 |
{
|
| 636 |
- uint32_t Work32 = (((uint32_t) S9xGetWord(OpAddress, w)) << 1) | CheckCarry(); |
|
| 627 |
+ uint32_t Work32 = (static_cast<uint32_t>(S9xGetWord(OpAddress, w)) << 1) | static_cast<uint32_t>(CheckCarry()); |
|
| 637 | 628 |
ICPU._Carry = Work32 >= 0x10000; |
| 638 | 629 |
AddCycles(ONE_CYCLE); |
| 639 |
- S9xSetWord((uint16_t) Work32, OpAddress, w, WRITE_10); |
|
| 630 |
+ S9xSetWord(static_cast<uint16_t>(Work32), OpAddress, w, WRITE_10); |
|
| 640 | 631 |
OpenBus = Work32 & 0xff; |
| 641 |
- SetZN((uint16_t) Work32); |
|
| 632 |
+ SetZN(static_cast<uint16_t>(Work32)); |
|
| 642 | 633 |
} |
| 643 | 634 |
|
| 644 |
-static inline void ROL8 (uint32_t OpAddress) |
|
| 635 |
+inline void ROL8(uint32_t OpAddress) |
|
| 645 | 636 |
{
|
| 646 |
- uint16_t Work16 = (((uint16_t) S9xGetByte(OpAddress)) << 1) | CheckCarry(); |
|
| 637 |
+ uint16_t Work16 = (static_cast<uint16_t>(S9xGetByte(OpAddress)) << 1) | static_cast<uint16_t>(CheckCarry()); |
|
| 647 | 638 |
ICPU._Carry = Work16 >= 0x100; |
| 648 | 639 |
AddCycles(ONE_CYCLE); |
| 649 |
- S9xSetByte((uint8_t) Work16, OpAddress); |
|
| 640 |
+ S9xSetByte(static_cast<uint8_t>(Work16), OpAddress); |
|
| 650 | 641 |
OpenBus = Work16 & 0xff; |
| 651 |
- SetZN((uint8_t) Work16); |
|
| 642 |
+ SetZN(static_cast<uint8_t>(Work16)); |
|
| 652 | 643 |
} |
| 653 | 644 |
|
| 654 |
-static inline void ROR16 (uint32_t OpAddress, s9xwrap_t w) |
|
| 645 |
+inline void ROR16(uint32_t OpAddress, s9xwrap_t w) |
|
| 655 | 646 |
{
|
| 656 |
- uint32_t Work32 = ((uint32_t) S9xGetWord(OpAddress, w)) | (((uint32_t) CheckCarry()) << 16); |
|
| 647 |
+ uint32_t Work32 = static_cast<uint32_t>(S9xGetWord(OpAddress, w)) | (static_cast<uint32_t>(CheckCarry()) << 16); |
|
| 657 | 648 |
ICPU._Carry = Work32 & 1; |
| 658 | 649 |
Work32 >>= 1; |
| 659 | 650 |
AddCycles(ONE_CYCLE); |
| 660 |
- S9xSetWord((uint16_t) Work32, OpAddress, w, WRITE_10); |
|
| 651 |
+ S9xSetWord(static_cast<uint16_t>(Work32), OpAddress, w, WRITE_10); |
|
| 661 | 652 |
OpenBus = Work32 & 0xff; |
| 662 |
- SetZN((uint16_t) Work32); |
|
| 653 |
+ SetZN(static_cast<uint16_t>(Work32)); |
|
| 663 | 654 |
} |
| 664 | 655 |
|
| 665 |
-static inline void ROR8 (uint32_t OpAddress) |
|
| 656 |
+inline void ROR8(uint32_t OpAddress) |
|
| 666 | 657 |
{
|
| 667 |
- uint16_t Work16 = ((uint16_t) S9xGetByte(OpAddress)) | (((uint16_t) CheckCarry()) << 8); |
|
| 658 |
+ uint16_t Work16 = static_cast<uint16_t>(S9xGetByte(OpAddress)) | (static_cast<uint16_t>(CheckCarry()) << 8); |
|
| 668 | 659 |
ICPU._Carry = Work16 & 1; |
| 669 | 660 |
Work16 >>= 1; |
| 670 | 661 |
AddCycles(ONE_CYCLE); |
| 671 |
- S9xSetByte((uint8_t) Work16, OpAddress); |
|
| 662 |
+ S9xSetByte(static_cast<uint8_t>(Work16), OpAddress); |
|
| 672 | 663 |
OpenBus = Work16 & 0xff; |
| 673 |
- SetZN((uint8_t) Work16); |
|
| 664 |
+ SetZN(static_cast<uint8_t>(Work16)); |
|
| 674 | 665 |
} |
| 675 | 666 |
|
| 676 |
-static inline void SBC (uint16_t Work16) |
|
| 667 |
+inline void SBC16(uint16_t Work16) |
|
| 677 | 668 |
{
|
| 678 | 669 |
if (CheckDecimal()) |
| 679 | 670 |
{
|
| 680 |
- uint16_t A1 = Registers.A.W & 0x000F; |
|
| 681 |
- uint16_t A2 = Registers.A.W & 0x00F0; |
|
| 682 |
- uint16_t A3 = Registers.A.W & 0x0F00; |
|
| 683 |
- uint32_t A4 = Registers.A.W & 0xF000; |
|
| 684 |
- uint16_t W1 = Work16 & 0x000F; |
|
| 685 |
- uint16_t W2 = Work16 & 0x00F0; |
|
| 686 |
- uint16_t W3 = Work16 & 0x0F00; |
|
| 687 |
- uint16_t W4 = Work16 & 0xF000; |
|
| 671 |
+ uint16_t A1 = Registers.A.W & 0x000F; |
|
| 672 |
+ uint16_t A2 = Registers.A.W & 0x00F0; |
|
| 673 |
+ uint16_t A3 = Registers.A.W & 0x0F00; |
|
| 674 |
+ uint32_t A4 = Registers.A.W & 0xF000; |
|
| 675 |
+ uint16_t W1 = Work16 & 0x000F; |
|
| 676 |
+ uint16_t W2 = Work16 & 0x00F0; |
|
| 677 |
+ uint16_t W3 = Work16 & 0x0F00; |
|
| 678 |
+ uint16_t W4 = Work16 & 0xF000; |
|
| 688 | 679 |
|
| 689 | 680 |
A1 -= W1 + !CheckCarry(); |
| 690 | 681 |
A2 -= W2; |
| ... | ... |
@@ -721,7 +712,7 @@ static inline void SBC (uint16_t Work16) |
| 721 | 712 |
else |
| 722 | 713 |
SetCarry(); |
| 723 | 714 |
|
| 724 |
- uint16_t Ans16 = A4 | A3 | A2 | A1; |
|
| 715 |
+ uint16_t Ans16 = A4 | A3 | A2 | A1; |
|
| 725 | 716 |
|
| 726 | 717 |
if ((Registers.A.W ^ Work16) & (Registers.A.W ^ Ans16) & 0x8000) |
| 727 | 718 |
SetOverflow(); |
| ... | ... |
@@ -733,28 +724,28 @@ static inline void SBC (uint16_t Work16) |
| 733 | 724 |
} |
| 734 | 725 |
else |
| 735 | 726 |
{
|
| 736 |
- int32_t Int32 = (int32_t) Registers.A.W - (int32_t) Work16 + (int32_t) CheckCarry() - 1; |
|
| 727 |
+ int32_t Int32 = static_cast<int32_t>(Registers.A.W) - static_cast<int32_t>(Work16) + static_cast<int32_t>(CheckCarry()) - 1; |
|
| 737 | 728 |
|
| 738 | 729 |
ICPU._Carry = Int32 >= 0; |
| 739 | 730 |
|
| 740 |
- if ((Registers.A.W ^ Work16) & (Registers.A.W ^ (uint16_t) Int32) & 0x8000) |
|
| 731 |
+ if ((Registers.A.W ^ Work16) & (Registers.A.W ^ static_cast<uint16_t>(Int32)) & 0x8000) |
|
| 741 | 732 |
SetOverflow(); |
| 742 | 733 |
else |
| 743 | 734 |
ClearOverflow(); |
| 744 | 735 |
|
| 745 |
- Registers.A.W = (uint16_t) Int32; |
|
| 736 |
+ Registers.A.W = static_cast<uint16_t>(Int32); |
|
| 746 | 737 |
SetZN(Registers.A.W); |
| 747 | 738 |
} |
| 748 | 739 |
} |
| 749 | 740 |
|
| 750 |
-static inline void SBC (uint8_t Work8) |
|
| 741 |
+inline void SBC8(uint8_t Work8) |
|
| 751 | 742 |
{
|
| 752 | 743 |
if (CheckDecimal()) |
| 753 | 744 |
{
|
| 754 |
- uint8_t A1 = Registers.A.W & 0x0F; |
|
| 755 |
- uint16_t A2 = Registers.A.W & 0xF0; |
|
| 756 |
- uint8_t W1 = Work8 & 0x0F; |
|
| 757 |
- uint8_t W2 = Work8 & 0xF0; |
|
| 745 |
+ uint8_t A1 = Registers.A.W & 0x0F; |
|
| 746 |
+ uint16_t A2 = Registers.A.W & 0xF0; |
|
| 747 |
+ uint8_t W1 = Work8 & 0x0F; |
|
| 748 |
+ uint8_t W2 = Work8 & 0xF0; |
|
| 758 | 749 |
|
| 759 | 750 |
A1 -= W1 + !CheckCarry(); |
| 760 | 751 |
A2 -= W2; |
| ... | ... |
@@ -775,115 +766,115 @@ static inline void SBC (uint8_t Work8) |
| 775 | 766 |
else |
| 776 | 767 |
SetCarry(); |
| 777 | 768 |
|
| 778 |
- uint8_t Ans8 = A2 | A1; |
|
| 769 |
+ uint8_t Ans8 = A2 | A1; |
|
| 779 | 770 |
|
| 780 |
- if ((Registers.AL ^ Work8) & (Registers.AL ^ Ans8) & 0x80) |
|
| 771 |
+ if ((Registers.A.B.l ^ Work8) & (Registers.A.B.l ^ Ans8) & 0x80) |
|
| 781 | 772 |
SetOverflow(); |
| 782 | 773 |
else |
| 783 | 774 |
ClearOverflow(); |
| 784 | 775 |
|
| 785 |
- Registers.AL = Ans8; |
|
| 786 |
- SetZN(Registers.AL); |
|
| 776 |
+ Registers.A.B.l = Ans8; |
|
| 777 |
+ SetZN(Registers.A.B.l); |
|
| 787 | 778 |
} |
| 788 | 779 |
else |
| 789 | 780 |
{
|
| 790 |
- int16_t Int16 = (int16_t) Registers.AL - (int16_t) Work8 + (int16_t) CheckCarry() - 1; |
|
| 781 |
+ int16_t Int16 = static_cast<int16_t>(Registers.A.B.l) - static_cast<int16_t>(Work8) + static_cast<int16_t>(CheckCarry()) - 1; |
|
| 791 | 782 |
|
| 792 | 783 |
ICPU._Carry = Int16 >= 0; |
| 793 | 784 |
|
| 794 |
- if ((Registers.AL ^ Work8) & (Registers.AL ^ (uint8_t) Int16) & 0x80) |
|
| 785 |
+ if ((Registers.A.B.l ^ Work8) & (Registers.A.B.l ^ static_cast<uint8_t>(Int16)) & 0x80) |
|
| 795 | 786 |
SetOverflow(); |
| 796 | 787 |
else |
| 797 | 788 |
ClearOverflow(); |
| 798 | 789 |
|
| 799 |
- Registers.AL = (uint8_t) Int16; |
|
| 800 |
- SetZN(Registers.AL); |
|
| 790 |
+ Registers.A.B.l = static_cast<uint8_t>(Int16); |
|
| 791 |
+ SetZN(Registers.A.B.l); |
|
| 801 | 792 |
} |
| 802 | 793 |
} |
| 803 | 794 |
|
| 804 |
-static inline void STA16 (uint32_t OpAddress, enum s9xwrap_t w) |
|
| 795 |
+inline void STA16(uint32_t OpAddress, s9xwrap_t w) |
|
| 805 | 796 |
{
|
| 806 | 797 |
S9xSetWord(Registers.A.W, OpAddress, w); |
| 807 |
- OpenBus = Registers.AH; |
|
| 798 |
+ OpenBus = Registers.A.B.h; |
|
| 808 | 799 |
} |
| 809 | 800 |
|
| 810 |
-static inline void STA8 (uint32_t OpAddress) |
|
| 801 |
+inline void STA8(uint32_t OpAddress) |
|
| 811 | 802 |
{
|
| 812 |
- S9xSetByte(Registers.AL, OpAddress); |
|
| 813 |
- OpenBus = Registers.AL; |
|
| 803 |
+ S9xSetByte(Registers.A.B.l, OpAddress); |
|
| 804 |
+ OpenBus = Registers.A.B.l; |
|
| 814 | 805 |
} |
| 815 | 806 |
|
| 816 |
-static inline void STX16 (uint32_t OpAddress, enum s9xwrap_t w) |
|
| 807 |
+inline void STX16(uint32_t OpAddress, s9xwrap_t w) |
|
| 817 | 808 |
{
|
| 818 | 809 |
S9xSetWord(Registers.X.W, OpAddress, w); |
| 819 |
- OpenBus = Registers.XH; |
|
| 810 |
+ OpenBus = Registers.X.B.h; |
|
| 820 | 811 |
} |
| 821 | 812 |
|
| 822 |
-static inline void STX8 (uint32_t OpAddress) |
|
| 813 |
+inline void STX8(uint32_t OpAddress) |
|
| 823 | 814 |
{
|
| 824 |
- S9xSetByte(Registers.XL, OpAddress); |
|
| 825 |
- OpenBus = Registers.XL; |
|
| 815 |
+ S9xSetByte(Registers.X.B.l, OpAddress); |
|
| 816 |
+ OpenBus = Registers.X.B.l; |
|
| 826 | 817 |
} |
| 827 | 818 |
|
| 828 |
-static inline void STY16 (uint32_t OpAddress, enum s9xwrap_t w) |
|
| 819 |
+inline void STY16(uint32_t OpAddress, s9xwrap_t w) |
|
| 829 | 820 |
{
|
| 830 | 821 |
S9xSetWord(Registers.Y.W, OpAddress, w); |
| 831 |
- OpenBus = Registers.YH; |
|
| 822 |
+ OpenBus = Registers.Y.B.h; |
|
| 832 | 823 |
} |
| 833 | 824 |
|
| 834 |
-static inline void STY8 (uint32_t OpAddress) |
|
| 825 |
+inline void STY8(uint32_t OpAddress) |
|
| 835 | 826 |
{
|
| 836 |
- S9xSetByte(Registers.YL, OpAddress); |
|
| 837 |
- OpenBus = Registers.YL; |
|
| 827 |
+ S9xSetByte(Registers.Y.B.l, OpAddress); |
|
| 828 |
+ OpenBus = Registers.Y.B.l; |
|
| 838 | 829 |
} |
| 839 | 830 |
|
| 840 |
-static inline void STZ16 (uint32_t OpAddress, enum s9xwrap_t w) |
|
| 831 |
+inline void STZ16(uint32_t OpAddress, s9xwrap_t w) |
|
| 841 | 832 |
{
|
| 842 | 833 |
S9xSetWord(0, OpAddress, w); |
| 843 | 834 |
OpenBus = 0; |
| 844 | 835 |
} |
| 845 | 836 |
|
| 846 |
-static inline void STZ8 (uint32_t OpAddress) |
|
| 837 |
+inline void STZ8(uint32_t OpAddress) |
|
| 847 | 838 |
{
|
| 848 | 839 |
S9xSetByte(0, OpAddress); |
| 849 | 840 |
OpenBus = 0; |
| 850 | 841 |
} |
| 851 | 842 |
|
| 852 |
-static inline void TSB16 (uint32_t OpAddress, enum s9xwrap_t w) |
|
| 843 |
+inline void TRB16(uint32_t OpAddress, s9xwrap_t w) |
|
| 853 | 844 |
{
|
| 854 |
- uint16_t Work16 = S9xGetWord(OpAddress, w); |
|
| 855 |
- ICPU._Zero = (Work16 & Registers.A.W) != 0; |
|
| 856 |
- Work16 |= Registers.A.W; |
|
| 845 |
+ uint16_t Work16 = S9xGetWord(OpAddress, w); |
|
| 846 |
+ ICPU._Zero = !!(Work16 & Registers.A.W); |
|
| 847 |
+ Work16 &= ~Registers.A.W; |
|
| 857 | 848 |
AddCycles(ONE_CYCLE); |
| 858 | 849 |
S9xSetWord(Work16, OpAddress, w, WRITE_10); |
| 859 | 850 |
OpenBus = Work16 & 0xff; |
| 860 | 851 |
} |
| 861 | 852 |
|
| 862 |
-static inline void TSB8 (uint32_t OpAddress) |
|
| 853 |
+inline void TRB8(uint32_t OpAddress) |
|
| 863 | 854 |
{
|
| 864 |
- uint8_t Work8 = S9xGetByte(OpAddress); |
|
| 865 |
- ICPU._Zero = Work8 & Registers.AL; |
|
| 866 |
- Work8 |= Registers.AL; |
|
| 855 |
+ uint8_t Work8 = S9xGetByte(OpAddress); |
|
| 856 |
+ ICPU._Zero = Work8 & Registers.A.B.l; |
|
| 857 |
+ Work8 &= ~Registers.A.B.l; |
|
| 867 | 858 |
AddCycles(ONE_CYCLE); |
| 868 | 859 |
S9xSetByte(Work8, OpAddress); |
| 869 | 860 |
OpenBus = Work8; |
| 870 | 861 |
} |
| 871 | 862 |
|
| 872 |
-static inline void TRB16 (uint32_t OpAddress, enum s9xwrap_t w) |
|
| 863 |
+inline void TSB16(uint32_t OpAddress, s9xwrap_t w) |
|
| 873 | 864 |
{
|
| 874 |
- uint16_t Work16 = S9xGetWord(OpAddress, w); |
|
| 875 |
- ICPU._Zero = (Work16 & Registers.A.W) != 0; |
|
| 876 |
- Work16 &= ~Registers.A.W; |
|
| 865 |
+ uint16_t Work16 = S9xGetWord(OpAddress, w); |
|
| 866 |
+ ICPU._Zero = !!(Work16 & Registers.A.W); |
|
| 867 |
+ Work16 |= Registers.A.W; |
|
| 877 | 868 |
AddCycles(ONE_CYCLE); |
| 878 | 869 |
S9xSetWord(Work16, OpAddress, w, WRITE_10); |
| 879 | 870 |
OpenBus = Work16 & 0xff; |
| 880 | 871 |
} |
| 881 | 872 |
|
| 882 |
-static inline void TRB8 (uint32_t OpAddress) |
|
| 873 |
+inline void TSB8(uint32_t OpAddress) |
|
| 883 | 874 |
{
|
| 884 |
- uint8_t Work8 = S9xGetByte(OpAddress); |
|
| 885 |
- ICPU._Zero = Work8 & Registers.AL; |
|
| 886 |
- Work8 &= ~Registers.AL; |
|
| 875 |
+ uint8_t Work8 = S9xGetByte(OpAddress); |
|
| 876 |
+ ICPU._Zero = Work8 & Registers.A.B.l; |
|
| 877 |
+ Work8 |= Registers.A.B.l; |
|
| 887 | 878 |
AddCycles(ONE_CYCLE); |
| 888 | 879 |
S9xSetByte(Work8, OpAddress); |
| 889 | 880 |
OpenBus = Work8; |
| 1 | 1 |
new file mode 100644 |
| ... | ... |
@@ -0,0 +1,892 @@ |
| 1 |
+/*********************************************************************************** |
|
| 2 |
+ Snes9x - Portable Super Nintendo Entertainment System (TM) emulator. |
|
| 3 |
+ |
|
| 4 |
+ (c) Copyright 1996 - 2002 Gary Henderson (gary.henderson@ntlworld.com), |
|
| 5 |
+ Jerremy Koot (jkoot@snes9x.com) |
|
| 6 |
+ |
|
| 7 |
+ (c) Copyright 2002 - 2004 Matthew Kendora |
|
| 8 |
+ |
|
| 9 |
+ (c) Copyright 2002 - 2005 Peter Bortas (peter@bortas.org) |
|
| 10 |
+ |
|
| 11 |
+ (c) Copyright 2004 - 2005 Joel Yliluoma (http://iki.fi/bisqwit/) |
|
| 12 |
+ |
|
| 13 |
+ (c) Copyright 2001 - 2006 John Weidman (jweidman@slip.net) |
|
| 14 |
+ |
|
| 15 |
+ (c) Copyright 2002 - 2006 funkyass (funkyass@spam.shaw.ca), |
|
| 16 |
+ Kris Bleakley (codeviolation@hotmail.com) |
|
| 17 |
+ |
|
| 18 |
+ (c) Copyright 2002 - 2010 Brad Jorsch (anomie@users.sourceforge.net), |
|
| 19 |
+ Nach (n-a-c-h@users.sourceforge.net), |
|
| 20 |
+ |
|
| 21 |
+ (c) Copyright 2002 - 2011 zones (kasumitokoduck@yahoo.com) |
|
| 22 |
+ |
|
| 23 |
+ (c) Copyright 2006 - 2007 nitsuja |
|
| 24 |
+ |
|
| 25 |
+ (c) Copyright 2009 - 2011 BearOso, |
|
| 26 |
+ OV2 |
|
| 27 |
+ |
|
| 28 |
+ |
|
| 29 |
+ BS-X C emulator code |
|
| 30 |
+ (c) Copyright 2005 - 2006 Dreamer Nom, |
|
| 31 |
+ zones |
|
| 32 |
+ |
|
| 33 |
+ C4 x86 assembler and some C emulation code |
|
| 34 |
+ (c) Copyright 2000 - 2003 _Demo_ (_demo_@zsnes.com), |
|
| 35 |
+ Nach, |
|
| 36 |
+ zsKnight (zsknight@zsnes.com) |
|
| 37 |
+ |
|
| 38 |
+ C4 C++ code |
|
| 39 |
+ (c) Copyright 2003 - 2006 Brad Jorsch, |
|
| 40 |
+ Nach |
|
| 41 |
+ |
|
| 42 |
+ DSP-1 emulator code |
|
| 43 |
+ (c) Copyright 1998 - 2006 _Demo_, |
|
| 44 |
+ Andreas Naive (andreasnaive@gmail.com), |
|
| 45 |
+ Gary Henderson, |
|
| 46 |
+ Ivar (ivar@snes9x.com), |
|
| 47 |
+ John Weidman, |
|
| 48 |
+ Kris Bleakley, |
|
| 49 |
+ Matthew Kendora, |
|
| 50 |
+ Nach, |
|
| 51 |
+ neviksti (neviksti@hotmail.com) |
|
| 52 |
+ |
|
| 53 |
+ DSP-2 emulator code |
|
| 54 |
+ (c) Copyright 2003 John Weidman, |
|
| 55 |
+ Kris Bleakley, |
|
| 56 |
+ Lord Nightmare (lord_nightmare@users.sourceforge.net), |
|
| 57 |
+ Matthew Kendora, |
|
| 58 |
+ neviksti |
|
| 59 |
+ |
|
| 60 |
+ DSP-3 emulator code |
|
| 61 |
+ (c) Copyright 2003 - 2006 John Weidman, |
|
| 62 |
+ Kris Bleakley, |
|
| 63 |
+ Lancer, |
|
| 64 |
+ z80 gaiden |
|
| 65 |
+ |
|
| 66 |
+ DSP-4 emulator code |
|
| 67 |
+ (c) Copyright 2004 - 2006 Dreamer Nom, |
|
| 68 |
+ John Weidman, |
|
| 69 |
+ Kris Bleakley, |
|
| 70 |
+ Nach, |
|
| 71 |
+ z80 gaiden |
|
| 72 |
+ |
|
| 73 |
+ OBC1 emulator code |
|
| 74 |
+ (c) Copyright 2001 - 2004 zsKnight, |
|
| 75 |
+ pagefault (pagefault@zsnes.com), |
|
| 76 |
+ Kris Bleakley |
|
| 77 |
+ Ported from x86 assembler to C by sanmaiwashi |
|
| 78 |
+ |
|
| 79 |
+ SPC7110 and RTC C++ emulator code used in 1.39-1.51 |
|
| 80 |
+ (c) Copyright 2002 Matthew Kendora with research by |
|
| 81 |
+ zsKnight, |
|
| 82 |
+ John Weidman, |
|
| 83 |
+ Dark Force |
|
| 84 |
+ |
|
| 85 |
+ SPC7110 and RTC C++ emulator code used in 1.52+ |
|
| 86 |
+ (c) Copyright 2009 byuu, |
|
| 87 |
+ neviksti |
|
| 88 |
+ |
|
| 89 |
+ S-DD1 C emulator code |
|
| 90 |
+ (c) Copyright 2003 Brad Jorsch with research by |
|
| 91 |
+ Andreas Naive, |
|
| 92 |
+ John Weidman |
|
| 93 |
+ |
|
| 94 |
+ S-RTC C emulator code |
|
| 95 |
+ (c) Copyright 2001 - 2006 byuu, |
|
| 96 |
+ John Weidman |
|
| 97 |
+ |
|
| 98 |
+ ST010 C++ emulator code |
|
| 99 |
+ (c) Copyright 2003 Feather, |
|
| 100 |
+ John Weidman, |
|
| 101 |
+ Kris Bleakley, |
|
| 102 |
+ Matthew Kendora |
|
| 103 |
+ |
|
| 104 |
+ Super FX x86 assembler emulator code |
|
| 105 |
+ (c) Copyright 1998 - 2003 _Demo_, |
|
| 106 |
+ pagefault, |
|
| 107 |
+ zsKnight |
|
| 108 |
+ |
|
| 109 |
+ Super FX C emulator code |
|
| 110 |
+ (c) Copyright 1997 - 1999 Ivar, |
|
| 111 |
+ Gary Henderson, |
|
| 112 |
+ John Weidman |
|
| 113 |
+ |
|
| 114 |
+ Sound emulator code used in 1.5-1.51 |
|
| 115 |
+ (c) Copyright 1998 - 2003 Brad Martin |
|
| 116 |
+ (c) Copyright 1998 - 2006 Charles Bilyue' |
|
| 117 |
+ |
|
| 118 |
+ Sound emulator code used in 1.52+ |
|
| 119 |
+ (c) Copyright 2004 - 2007 Shay Green (gblargg@gmail.com) |
|
| 120 |
+ |
|
| 121 |
+ SH assembler code partly based on x86 assembler code |
|
| 122 |
+ (c) Copyright 2002 - 2004 Marcus Comstedt (marcus@mc.pp.se) |
|
| 123 |
+ |
|
| 124 |
+ 2xSaI filter |
|
| 125 |
+ (c) Copyright 1999 - 2001 Derek Liauw Kie Fa |
|
| 126 |
+ |
|
| 127 |
+ HQ2x, HQ3x, HQ4x filters |
|
| 128 |
+ (c) Copyright 2003 Maxim Stepin (maxim@hiend3d.com) |
|
| 129 |
+ |
|
| 130 |
+ NTSC filter |
|
| 131 |
+ (c) Copyright 2006 - 2007 Shay Green |
|
| 132 |
+ |
|
| 133 |
+ GTK+ GUI code |
|
| 134 |
+ (c) Copyright 2004 - 2011 BearOso |
|
| 135 |
+ |
|
| 136 |
+ Win32 GUI code |
|
| 137 |
+ (c) Copyright 2003 - 2006 blip, |
|
| 138 |
+ funkyass, |
|
| 139 |
+ Matthew Kendora, |
|
| 140 |
+ Nach, |
|
| 141 |
+ nitsuja |
|
| 142 |
+ (c) Copyright 2009 - 2011 OV2 |
|
| 143 |
+ |
|
| 144 |
+ Mac OS GUI code |
|
| 145 |
+ (c) Copyright 1998 - 2001 John Stiles |
|
| 146 |
+ (c) Copyright 2001 - 2011 zones |
|
| 147 |
+ |
|
| 148 |
+ |
|
| 149 |
+ Specific ports contains the works of other authors. See headers in |
|
| 150 |
+ individual files. |
|
| 151 |
+ |
|
| 152 |
+ |
|
| 153 |
+ Snes9x homepage: http://www.snes9x.com/ |
|
| 154 |
+ |
|
| 155 |
+ Permission to use, copy, modify and/or distribute Snes9x in both binary |
|
| 156 |
+ and source form, for non-commercial purposes, is hereby granted without |
|
| 157 |
+ fee, providing that this license information and copyright notice appear |
|
| 158 |
+ with all copies and any derived work. |
|
| 159 |
+ |
|
| 160 |
+ This software is provided 'as-is', without any express or implied |
|
| 161 |
+ warranty. In no event shall the authors be held liable for any damages |
|
| 162 |
+ arising from the use of this software or it's derivatives. |
|
| 163 |
+ |
|
| 164 |
+ Snes9x is freeware for PERSONAL USE only. Commercial users should |
|
| 165 |
+ seek permission of the copyright holders first. Commercial use includes, |
|
| 166 |
+ but is not limited to, charging money for Snes9x or software derived from |
|
| 167 |
+ Snes9x, including Snes9x or derivatives in commercial game bundles, and/or |
|
| 168 |
+ using Snes9x as a promotion for your commercial product. |
|
| 169 |
+ |
|
| 170 |
+ The copyright holders request that bug fixes and improvements to the code |
|
| 171 |
+ should be forwarded to them so everyone can benefit from the modifications |
|
| 172 |
+ in future versions. |
|
| 173 |
+ |
|
| 174 |
+ Super NES and Super Nintendo Entertainment System are trademarks of |
|
| 175 |
+ Nintendo Co., Limited and its subsidiary companies. |
|
| 176 |
+ ***********************************************************************************/ |
|
| 177 |
+ |
|
| 178 |
+ |
|
| 179 |
+#ifndef _CPUMACRO_H_ |
|
| 180 |
+#define _CPUMACRO_H_ |
|
| 181 |
+ |
|
| 182 |
+#define rOP8(OP, ADDR, WRAP, FUNC) \ |
|
| 183 |
+static void Op##OP() \ |
|
| 184 |
+{ \
|
|
| 185 |
+ uint8_t val = OpenBus = S9xGetByte(ADDR(READ)); \ |
|
| 186 |
+ FUNC(val); \ |
|
| 187 |
+} |
|
| 188 |
+ |
|
| 189 |
+#define rOP16(OP, ADDR, WRAP, FUNC) \ |
|
| 190 |
+static void Op##OP() \ |
|
| 191 |
+{ \
|
|
| 192 |
+ uint16_t val = S9xGetWord(ADDR(READ), WRAP); \ |
|
| 193 |
+ OpenBus = (uint8_t) (val >> 8); \ |
|
| 194 |
+ FUNC(val); \ |
|
| 195 |
+} |
|
| 196 |
+ |
|
| 197 |
+#define rOPC(OP, COND, ADDR, WRAP, FUNC) \ |
|
| 198 |
+static void Op##OP() \ |
|
| 199 |
+{ \
|
|
| 200 |
+ if (Check##COND()) \ |
|
| 201 |
+ { \
|
|
| 202 |
+ uint8_t val = OpenBus = S9xGetByte(ADDR(READ)); \ |
|
| 203 |
+ FUNC(val); \ |
|
| 204 |
+ } \ |
|
| 205 |
+ else \ |
|
| 206 |
+ { \
|
|
| 207 |
+ uint16_t val = S9xGetWord(ADDR(READ), WRAP); \ |
|
| 208 |
+ OpenBus = (uint8_t) (val >> 8); \ |
|
| 209 |
+ FUNC(val); \ |
|
| 210 |
+ } \ |
|
| 211 |
+} |
|
| 212 |
+ |
|
| 213 |
+#define rOPM(OP, ADDR, WRAP, FUNC) \ |
|
| 214 |
+rOPC(OP, Memory, ADDR, WRAP, FUNC) |
|
| 215 |
+ |
|
| 216 |
+#define rOPX(OP, ADDR, WRAP, FUNC) \ |
|
| 217 |
+rOPC(OP, Index, ADDR, WRAP, FUNC) |
|
| 218 |
+ |
|
| 219 |
+#define wOP8(OP, ADDR, WRAP, FUNC) \ |
|
| 220 |
+static void Op##OP() \ |
|
| 221 |
+{ \
|
|
| 222 |
+ FUNC##8(ADDR(WRITE)); \ |
|
| 223 |
+} |
|
| 224 |
+ |
|
| 225 |
+#define wOP16(OP, ADDR, WRAP, FUNC) \ |
|
| 226 |
+static void Op##OP() \ |
|
| 227 |
+{ \
|
|
| 228 |
+ FUNC##16(ADDR(WRITE), WRAP); \ |
|
| 229 |
+} |
|
| 230 |
+ |
|
| 231 |
+#define wOPC(OP, COND, ADDR, WRAP, FUNC) \ |
|
| 232 |
+static void Op##OP() \ |
|
| 233 |
+{ \
|
|
| 234 |
+ if (Check##COND()) \ |
|
| 235 |
+ FUNC##8(ADDR(WRITE)); \ |
|
| 236 |
+ else \ |
|
| 237 |
+ FUNC##16(ADDR(WRITE), WRAP); \ |
|
| 238 |
+} |
|
| 239 |
+ |
|
| 240 |
+#define wOPM(OP, ADDR, WRAP, FUNC) \ |
|
| 241 |
+wOPC(OP, Memory, ADDR, WRAP, FUNC) |
|
| 242 |
+ |
|
| 243 |
+#define wOPX(OP, ADDR, WRAP, FUNC) \ |
|
| 244 |
+wOPC(OP, Index, ADDR, WRAP, FUNC) |
|
| 245 |
+ |
|
| 246 |
+#define mOP8(OP, ADDR, WRAP, FUNC) \ |
|
| 247 |
+static void Op##OP() \ |
|
| 248 |
+{ \
|
|
| 249 |
+ FUNC##8(ADDR(MODIFY)); \ |
|
| 250 |
+} |
|
| 251 |
+ |
|
| 252 |
+#define mOP16(OP, ADDR, WRAP, FUNC) \ |
|
| 253 |
+static void Op##OP() \ |
|
| 254 |
+{ \
|
|
| 255 |
+ FUNC##16(ADDR(MODIFY), WRAP); \ |
|
| 256 |
+} |
|
| 257 |
+ |
|
| 258 |
+#define mOPC(OP, COND, ADDR, WRAP, FUNC) \ |
|
| 259 |
+static void Op##OP() \ |
|
| 260 |
+{ \
|
|
| 261 |
+ if (Check##COND()) \ |
|
| 262 |
+ FUNC##8(ADDR(MODIFY)); \ |
|
| 263 |
+ else \ |
|
| 264 |
+ FUNC##16(ADDR(MODIFY), WRAP); \ |
|
| 265 |
+} |
|
| 266 |
+ |
|
| 267 |
+#define mOPM(OP, ADDR, WRAP, FUNC) \ |
|
| 268 |
+mOPC(OP, Memory, ADDR, WRAP, FUNC) |
|
| 269 |
+ |
|
| 270 |
+#define bOP(OP, REL, COND, CHK, E) \ |
|
| 271 |
+static void Op##OP() \ |
|
| 272 |
+{ \
|
|
| 273 |
+ pair newPC; \ |
|
| 274 |
+ newPC.W = REL(JUMP); \ |
|
| 275 |
+ if (COND) \ |
|
| 276 |
+ { \
|
|
| 277 |
+ AddCycles(ONE_CYCLE); \ |
|
| 278 |
+ if (E && Registers.PCh != newPC.B.h) \ |
|
| 279 |
+ AddCycles(ONE_CYCLE); \ |
|
| 280 |
+ if ((Registers.PCw & ~MEMMAP_MASK) != (newPC.W & ~MEMMAP_MASK)) \ |
|
| 281 |
+ S9xSetPCBase(ICPU.ShiftedPB + newPC.W); \ |
|
| 282 |
+ else \ |
|
| 283 |
+ Registers.PCw = newPC.W; \ |
|
| 284 |
+ } \ |
|
| 285 |
+} |
|
| 286 |
+ |
|
| 287 |
+ |
|
| 288 |
+static inline void SetZN (uint16_t Work16) |
|
| 289 |
+{
|
|
| 290 |
+ ICPU._Zero = Work16 != 0; |
|
| 291 |
+ ICPU._Negative = (uint8_t) (Work16 >> 8); |
|
| 292 |
+} |
|
| 293 |
+ |
|
| 294 |
+static inline void SetZN (uint8_t Work8) |
|
| 295 |
+{
|
|
| 296 |
+ ICPU._Zero = Work8; |
|
| 297 |
+ ICPU._Negative = Work8; |
|
| 298 |
+} |
|
| 299 |
+ |
|
| 300 |
+static inline void ADC (uint16_t Work16) |
|
| 301 |
+{
|
|
| 302 |
+ if (CheckDecimal()) |
|
| 303 |
+ {
|
|
| 304 |
+ uint16_t A1 = Registers.A.W & 0x000F; |
|
| 305 |
+ uint16_t A2 = Registers.A.W & 0x00F0; |
|
| 306 |
+ uint16_t A3 = Registers.A.W & 0x0F00; |
|
| 307 |
+ uint32_t A4 = Registers.A.W & 0xF000; |
|
| 308 |
+ uint16_t W1 = Work16 & 0x000F; |
|
| 309 |
+ uint16_t W2 = Work16 & 0x00F0; |
|
| 310 |
+ uint16_t W3 = Work16 & 0x0F00; |
|
| 311 |
+ uint16_t W4 = Work16 & 0xF000; |
|
| 312 |
+ |
|
| 313 |
+ A1 += W1 + CheckCarry(); |
|
| 314 |
+ if (A1 > 0x0009) |
|
| 315 |
+ {
|
|
| 316 |
+ A1 -= 0x000A; |
|
| 317 |
+ A1 &= 0x000F; |
|
| 318 |
+ A2 += 0x0010; |
|
| 319 |
+ } |
|
| 320 |
+ |
|
| 321 |
+ A2 += W2; |
|
| 322 |
+ if (A2 > 0x0090) |
|
| 323 |
+ {
|
|
| 324 |
+ A2 -= 0x00A0; |
|
| 325 |
+ A2 &= 0x00F0; |
|
| 326 |
+ A3 += 0x0100; |
|
| 327 |
+ } |
|
| 328 |
+ |
|
| 329 |
+ A3 += W3; |
|
| 330 |
+ if (A3 > 0x0900) |
|
| 331 |
+ {
|
|
| 332 |
+ A3 -= 0x0A00; |
|
| 333 |
+ A3 &= 0x0F00; |
|
| 334 |
+ A4 += 0x1000; |
|
| 335 |
+ } |
|
| 336 |
+ |
|
| 337 |
+ A4 += W4; |
|
| 338 |
+ if (A4 > 0x9000) |
|
| 339 |
+ {
|
|
| 340 |
+ A4 -= 0xA000; |
|
| 341 |
+ A4 &= 0xF000; |
|
| 342 |
+ SetCarry(); |
|
| 343 |
+ } |
|
| 344 |
+ else |
|
| 345 |
+ ClearCarry(); |
|
| 346 |
+ |
|
| 347 |
+ uint16_t Ans16 = A4 | A3 | A2 | A1; |
|
| 348 |
+ |
|
| 349 |
+ if (~(Registers.A.W ^ Work16) & (Work16 ^ Ans16) & 0x8000) |
|
| 350 |
+ SetOverflow(); |
|
| 351 |
+ else |
|
| 352 |
+ ClearOverflow(); |
|
| 353 |
+ |
|
| 354 |
+ Registers.A.W = Ans16; |
|
| 355 |
+ SetZN(Registers.A.W); |
|
| 356 |
+ } |
|
| 357 |
+ else |
|
| 358 |
+ {
|
|
| 359 |
+ uint32_t Ans32 = Registers.A.W + Work16 + CheckCarry(); |
|
| 360 |
+ |
|
| 361 |
+ ICPU._Carry = Ans32 >= 0x10000; |
|
| 362 |
+ |
|
| 363 |
+ if (~(Registers.A.W ^ Work16) & (Work16 ^ (uint16_t) Ans32) & 0x8000) |
|
| 364 |
+ SetOverflow(); |
|
| 365 |
+ else |
|
| 366 |
+ ClearOverflow(); |
|
| 367 |
+ |
|
| 368 |
+ Registers.A.W = (uint16_t) Ans32; |
|
| 369 |
+ SetZN(Registers.A.W); |
|
| 370 |
+ } |
|
| 371 |
+} |
|
| 372 |
+ |
|
| 373 |
+static inline void ADC (uint8_t Work8) |
|
| 374 |
+{
|
|
| 375 |
+ if (CheckDecimal()) |
|
| 376 |
+ {
|
|
| 377 |
+ uint8_t A1 = Registers.A.W & 0x0F; |
|
| 378 |
+ uint16_t A2 = Registers.A.W & 0xF0; |
|
| 379 |
+ uint8_t W1 = Work8 & 0x0F; |
|
| 380 |
+ uint8_t W2 = Work8 & 0xF0; |
|
| 381 |
+ |
|
| 382 |
+ A1 += W1 + CheckCarry(); |
|
| 383 |
+ if (A1 > 0x09) |
|
| 384 |
+ {
|
|
| 385 |
+ A1 -= 0x0A; |
|
| 386 |
+ A1 &= 0x0F; |
|
| 387 |
+ A2 += 0x10; |
|
| 388 |
+ } |
|
| 389 |
+ |
|
| 390 |
+ A2 += W2; |
|
| 391 |
+ if (A2 > 0x90) |
|
| 392 |
+ {
|
|
| 393 |
+ A2 -= 0xA0; |
|
| 394 |
+ A2 &= 0xF0; |
|
| 395 |
+ SetCarry(); |
|
| 396 |
+ } |
|
| 397 |
+ else |
|
| 398 |
+ ClearCarry(); |
|
| 399 |
+ |
|
| 400 |
+ uint8_t Ans8 = A2 | A1; |
|
| 401 |
+ |
|
| 402 |
+ if (~(Registers.AL ^ Work8) & (Work8 ^ Ans8) & 0x80) |
|
| 403 |
+ SetOverflow(); |
|
| 404 |
+ else |
|
| 405 |
+ ClearOverflow(); |
|
| 406 |
+ |
|
| 407 |
+ Registers.AL = Ans8; |
|
| 408 |
+ SetZN(Registers.AL); |
|
| 409 |
+ } |
|
| 410 |
+ else |
|
| 411 |
+ {
|
|
| 412 |
+ uint16_t Ans16 = Registers.AL + Work8 + CheckCarry(); |
|
| 413 |
+ |
|
| 414 |
+ ICPU._Carry = Ans16 >= 0x100; |
|
| 415 |
+ |
|
| 416 |
+ if (~(Registers.AL ^ Work8) & (Work8 ^ (uint8_t) Ans16) & 0x80) |
|
| 417 |
+ SetOverflow(); |
|
| 418 |
+ else |
|
| 419 |
+ ClearOverflow(); |
|
| 420 |
+ |
|
| 421 |
+ Registers.AL = (uint8_t) Ans16; |
|
| 422 |
+ SetZN(Registers.AL); |
|
| 423 |
+ } |
|
| 424 |
+} |
|
| 425 |
+ |
|
| 426 |
+static inline void AND (uint16_t Work16) |
|
| 427 |
+{
|
|
| 428 |
+ Registers.A.W &= Work16; |
|
| 429 |
+ SetZN(Registers.A.W); |
|
| 430 |
+} |
|
| 431 |
+ |
|
| 432 |
+static inline void AND (uint8_t Work8) |
|
| 433 |
+{
|
|
| 434 |
+ Registers.AL &= Work8; |
|
| 435 |
+ SetZN(Registers.AL); |
|
| 436 |
+} |
|
| 437 |
+ |
|
| 438 |
+static inline void ASL16 (uint32_t OpAddress, s9xwrap_t w) |
|
| 439 |
+{
|
|
| 440 |
+ uint16_t Work16 = S9xGetWord(OpAddress, w); |
|
| 441 |
+ ICPU._Carry = (Work16 & 0x8000) != 0; |
|
| 442 |
+ Work16 <<= 1; |
|
| 443 |
+ AddCycles(ONE_CYCLE); |
|
| 444 |
+ S9xSetWord(Work16, OpAddress, w, WRITE_10); |
|
| 445 |
+ OpenBus = Work16 & 0xff; |
|
| 446 |
+ SetZN(Work16); |
|
| 447 |
+} |
|
| 448 |
+ |
|
| 449 |
+static inline void ASL8 (uint32_t OpAddress) |
|
| 450 |
+{
|
|
| 451 |
+ uint8_t Work8 = S9xGetByte(OpAddress); |
|
| 452 |
+ ICPU._Carry = (Work8 & 0x80) != 0; |
|
| 453 |
+ Work8 <<= 1; |
|
| 454 |
+ AddCycles(ONE_CYCLE); |
|
| 455 |
+ S9xSetByte(Work8, OpAddress); |
|
| 456 |
+ OpenBus = Work8; |
|
| 457 |
+ SetZN(Work8); |
|
| 458 |
+} |
|
| 459 |
+ |
|
| 460 |
+static inline void BIT (uint16_t Work16) |
|
| 461 |
+{
|
|
| 462 |
+ ICPU._Overflow = (Work16 & 0x4000) != 0; |
|
| 463 |
+ ICPU._Negative = (uint8_t) (Work16 >> 8); |
|
| 464 |
+ ICPU._Zero = (Work16 & Registers.A.W) != 0; |
|
| 465 |
+} |
|
| 466 |
+ |
|
| 467 |
+static inline void BIT (uint8_t Work8) |
|
| 468 |
+{
|
|
| 469 |
+ ICPU._Overflow = (Work8 & 0x40) != 0; |
|
| 470 |
+ ICPU._Negative = Work8; |
|
| 471 |
+ ICPU._Zero = Work8 & Registers.AL; |
|
| 472 |
+} |
|
| 473 |
+ |
|
| 474 |
+static inline void CMP (uint16_t val) |
|
| 475 |
+{
|
|
| 476 |
+ int32_t Int32 = (int32_t) Registers.A.W - (int32_t) val; |
|
| 477 |
+ ICPU._Carry = Int32 >= 0; |
|
| 478 |
+ SetZN((uint16_t) Int32); |
|
| 479 |
+} |
|
| 480 |
+ |
|
| 481 |
+static inline void CMP (uint8_t val) |
|
| 482 |
+{
|
|
| 483 |
+ int16_t Int16 = (int16_t) Registers.AL - (int16_t) val; |
|
| 484 |
+ ICPU._Carry = Int16 >= 0; |
|
| 485 |
+ SetZN((uint8_t) Int16); |
|
| 486 |
+} |
|
| 487 |
+ |
|
| 488 |
+static inline void CPX (uint16_t val) |
|
| 489 |
+{
|
|
| 490 |
+ int32_t Int32 = (int32_t) Registers.X.W - (int32_t) val; |
|
| 491 |
+ ICPU._Carry = Int32 >= 0; |
|
| 492 |
+ SetZN((uint16_t) Int32); |
|
| 493 |
+} |
|
| 494 |
+ |
|
| 495 |
+static inline void CPX (uint8_t val) |
|
| 496 |
+{
|
|
| 497 |
+ int16_t Int16 = (int16_t) Registers.XL - (int16_t) val; |
|
| 498 |
+ ICPU._Carry = Int16 >= 0; |
|
| 499 |
+ SetZN((uint8_t) Int16); |
|
| 500 |
+} |
|
| 501 |
+ |
|
| 502 |
+static inline void CPY (uint16_t val) |
|
| 503 |
+{
|
|
| 504 |
+ int32_t Int32 = (int32_t) Registers.Y.W - (int32_t) val; |
|
| 505 |
+ ICPU._Carry = Int32 >= 0; |
|
| 506 |
+ SetZN((uint16_t) Int32); |
|
| 507 |
+} |
|
| 508 |
+ |
|
| 509 |
+static inline void CPY (uint8_t val) |
|
| 510 |
+{
|
|
| 511 |
+ int16_t Int16 = (int16_t) Registers.YL - (int16_t) val; |
|
| 512 |
+ ICPU._Carry = Int16 >= 0; |
|
| 513 |
+ SetZN((uint8_t) Int16); |
|
| 514 |
+} |
|
| 515 |
+ |
|
| 516 |
+static inline void DEC16 (uint32_t OpAddress, s9xwrap_t w) |
|
| 517 |
+{
|
|
| 518 |
+ uint16_t Work16 = S9xGetWord(OpAddress, w) - 1; |
|
| 519 |
+ AddCycles(ONE_CYCLE); |
|
| 520 |
+ S9xSetWord(Work16, OpAddress, w, WRITE_10); |
|
| 521 |
+ OpenBus = Work16 & 0xff; |
|
| 522 |
+ SetZN(Work16); |
|
| 523 |
+} |
|
| 524 |
+ |
|
| 525 |
+static inline void DEC8 (uint32_t OpAddress) |
|
| 526 |
+{
|
|
| 527 |
+ uint8_t Work8 = S9xGetByte(OpAddress) - 1; |
|
| 528 |
+ AddCycles(ONE_CYCLE); |
|
| 529 |
+ S9xSetByte(Work8, OpAddress); |
|
| 530 |
+ OpenBus = Work8; |
|
| 531 |
+ SetZN(Work8); |
|
| 532 |
+} |
|
| 533 |
+ |
|
| 534 |
+static inline void EOR (uint16_t val) |
|
| 535 |
+{
|
|
| 536 |
+ Registers.A.W ^= val; |
|
| 537 |
+ SetZN(Registers.A.W); |
|
| 538 |
+} |
|
| 539 |
+ |
|
| 540 |
+static inline void EOR (uint8_t val) |
|
| 541 |
+{
|
|
| 542 |
+ Registers.AL ^= val; |
|
| 543 |
+ SetZN(Registers.AL); |
|
| 544 |
+} |
|
| 545 |
+ |
|
| 546 |
+static inline void INC16 (uint32_t OpAddress, s9xwrap_t w) |
|
| 547 |
+{
|
|
| 548 |
+ uint16_t Work16 = S9xGetWord(OpAddress, w) + 1; |
|
| 549 |
+ AddCycles(ONE_CYCLE); |
|
| 550 |
+ S9xSetWord(Work16, OpAddress, w, WRITE_10); |
|
| 551 |
+ OpenBus = Work16 & 0xff; |
|
| 552 |
+ SetZN(Work16); |
|
| 553 |
+} |
|
| 554 |
+ |
|
| 555 |
+static inline void INC8 (uint32_t OpAddress) |
|
| 556 |
+{
|
|
| 557 |
+ uint8_t Work8 = S9xGetByte(OpAddress) + 1; |
|
| 558 |
+ AddCycles(ONE_CYCLE); |
|
| 559 |
+ S9xSetByte(Work8, OpAddress); |
|
| 560 |
+ OpenBus = Work8; |
|
| 561 |
+ SetZN(Work8); |
|
| 562 |
+} |
|
| 563 |
+ |
|
| 564 |
+static inline void LDA (uint16_t val) |
|
| 565 |
+{
|
|
| 566 |
+ Registers.A.W = val; |
|
| 567 |
+ SetZN(Registers.A.W); |
|
| 568 |
+} |
|
| 569 |
+ |
|
| 570 |
+static inline void LDA (uint8_t val) |
|
| 571 |
+{
|
|
| 572 |
+ Registers.AL = val; |
|
| 573 |
+ SetZN(Registers.AL); |
|
| 574 |
+} |
|
| 575 |
+ |
|
| 576 |
+static inline void LDX (uint16_t val) |
|
| 577 |
+{
|
|
| 578 |
+ Registers.X.W = val; |
|
| 579 |
+ SetZN(Registers.X.W); |
|
| 580 |
+} |
|
| 581 |
+ |
|
| 582 |
+static inline void LDX (uint8_t val) |
|
| 583 |
+{
|
|
| 584 |
+ Registers.XL = val; |
|
| 585 |
+ SetZN(Registers.XL); |
|
| 586 |
+} |
|
| 587 |
+ |
|
| 588 |
+static inline void LDY (uint16_t val) |
|
| 589 |
+{
|
|
| 590 |
+ Registers.Y.W = val; |
|
| 591 |
+ SetZN(Registers.Y.W); |
|
| 592 |
+} |
|
| 593 |
+ |
|
| 594 |
+static inline void LDY (uint8_t val) |
|
| 595 |
+{
|
|
| 596 |
+ Registers.YL = val; |
|
| 597 |
+ SetZN(Registers.YL); |
|
| 598 |
+} |
|
| 599 |
+ |
|
| 600 |
+static inline void LSR16 (uint32_t OpAddress, s9xwrap_t w) |
|
| 601 |
+{
|
|
| 602 |
+ uint16_t Work16 = S9xGetWord(OpAddress, w); |
|
| 603 |
+ ICPU._Carry = Work16 & 1; |
|
| 604 |
+ Work16 >>= 1; |
|
| 605 |
+ AddCycles(ONE_CYCLE); |
|
| 606 |
+ S9xSetWord(Work16, OpAddress, w, WRITE_10); |
|
| 607 |
+ OpenBus = Work16 & 0xff; |
|
| 608 |
+ SetZN(Work16); |
|
| 609 |
+} |
|
| 610 |
+ |
|
| 611 |
+static inline void LSR8 (uint32_t OpAddress) |
|
| 612 |
+{
|
|
| 613 |
+ uint8_t Work8 = S9xGetByte(OpAddress); |
|
| 614 |
+ ICPU._Carry = Work8 & 1; |
|
| 615 |
+ Work8 >>= 1; |
|
| 616 |
+ AddCycles(ONE_CYCLE); |
|
| 617 |
+ S9xSetByte(Work8, OpAddress); |
|
| 618 |
+ OpenBus = Work8; |
|
| 619 |
+ SetZN(Work8); |
|
| 620 |
+} |
|
| 621 |
+ |
|
| 622 |
+static inline void ORA (uint16_t val) |
|
| 623 |
+{
|
|
| 624 |
+ Registers.A.W |= val; |
|
| 625 |
+ SetZN(Registers.A.W); |
|
| 626 |
+} |
|
| 627 |
+ |
|
| 628 |
+static inline void ORA (uint8_t val) |
|
| 629 |
+{
|
|
| 630 |
+ Registers.AL |= val; |
|
| 631 |
+ SetZN(Registers.AL); |
|
| 632 |
+} |
|
| 633 |
+ |
|
| 634 |
+static inline void ROL16 (uint32_t OpAddress, s9xwrap_t w) |
|
| 635 |
+{
|
|
| 636 |
+ uint32_t Work32 = (((uint32_t) S9xGetWord(OpAddress, w)) << 1) | CheckCarry(); |
|
| 637 |
+ ICPU._Carry = Work32 >= 0x10000; |
|
| 638 |
+ AddCycles(ONE_CYCLE); |
|
| 639 |
+ S9xSetWord((uint16_t) Work32, OpAddress, w, WRITE_10); |
|
| 640 |
+ OpenBus = Work32 & 0xff; |
|
| 641 |
+ SetZN((uint16_t) Work32); |
|
| 642 |
+} |
|
| 643 |
+ |
|
| 644 |
+static inline void ROL8 (uint32_t OpAddress) |
|
| 645 |
+{
|
|
| 646 |
+ uint16_t Work16 = (((uint16_t) S9xGetByte(OpAddress)) << 1) | CheckCarry(); |
|
| 647 |
+ ICPU._Carry = Work16 >= 0x100; |
|
| 648 |
+ AddCycles(ONE_CYCLE); |
|
| 649 |
+ S9xSetByte((uint8_t) Work16, OpAddress); |
|
| 650 |
+ OpenBus = Work16 & 0xff; |
|
| 651 |
+ SetZN((uint8_t) Work16); |
|
| 652 |
+} |
|
| 653 |
+ |
|
| 654 |
+static inline void ROR16 (uint32_t OpAddress, s9xwrap_t w) |
|
| 655 |
+{
|
|
| 656 |
+ uint32_t Work32 = ((uint32_t) S9xGetWord(OpAddress, w)) | (((uint32_t) CheckCarry()) << 16); |
|
| 657 |
+ ICPU._Carry = Work32 & 1; |
|
| 658 |
+ Work32 >>= 1; |
|
| 659 |
+ AddCycles(ONE_CYCLE); |
|
| 660 |
+ S9xSetWord((uint16_t) Work32, OpAddress, w, WRITE_10); |
|
| 661 |
+ OpenBus = Work32 & 0xff; |
|
| 662 |
+ SetZN((uint16_t) Work32); |
|
| 663 |
+} |
|
| 664 |
+ |
|
| 665 |
+static inline void ROR8 (uint32_t OpAddress) |
|
| 666 |
+{
|
|
| 667 |
+ uint16_t Work16 = ((uint16_t) S9xGetByte(OpAddress)) | (((uint16_t) CheckCarry()) << 8); |
|
| 668 |
+ ICPU._Carry = Work16 & 1; |
|
| 669 |
+ Work16 >>= 1; |
|
| 670 |
+ AddCycles(ONE_CYCLE); |
|
| 671 |
+ S9xSetByte((uint8_t) Work16, OpAddress); |
|
| 672 |
+ OpenBus = Work16 & 0xff; |
|
| 673 |
+ SetZN((uint8_t) Work16); |
|
| 674 |
+} |
|
| 675 |
+ |
|
| 676 |
+static inline void SBC (uint16_t Work16) |
|
| 677 |
+{
|
|
| 678 |
+ if (CheckDecimal()) |
|
| 679 |
+ {
|
|
| 680 |
+ uint16_t A1 = Registers.A.W & 0x000F; |
|
| 681 |
+ uint16_t A2 = Registers.A.W & 0x00F0; |
|
| 682 |
+ uint16_t A3 = Registers.A.W & 0x0F00; |
|
| 683 |
+ uint32_t A4 = Registers.A.W & 0xF000; |
|
| 684 |
+ uint16_t W1 = Work16 & 0x000F; |
|
| 685 |
+ uint16_t W2 = Work16 & 0x00F0; |
|
| 686 |
+ uint16_t W3 = Work16 & 0x0F00; |
|
| 687 |
+ uint16_t W4 = Work16 & 0xF000; |
|
| 688 |
+ |
|
| 689 |
+ A1 -= W1 + !CheckCarry(); |
|
| 690 |
+ A2 -= W2; |
|
| 691 |
+ A3 -= W3; |
|
| 692 |
+ A4 -= W4; |
|
| 693 |
+ |
|
| 694 |
+ if (A1 > 0x000F) |
|
| 695 |
+ {
|
|
| 696 |
+ A1 += 0x000A; |
|
| 697 |
+ A1 &= 0x000F; |
|
| 698 |
+ A2 -= 0x0010; |
|
| 699 |
+ } |
|
| 700 |
+ |
|
| 701 |
+ if (A2 > 0x00F0) |
|
| 702 |
+ {
|
|
| 703 |
+ A2 += 0x00A0; |
|
| 704 |
+ A2 &= 0x00F0; |
|
| 705 |
+ A3 -= 0x0100; |
|
| 706 |
+ } |
|
| 707 |
+ |
|
| 708 |
+ if (A3 > 0x0F00) |
|
| 709 |
+ {
|
|
| 710 |
+ A3 += 0x0A00; |
|
| 711 |
+ A3 &= 0x0F00; |
|
| 712 |
+ A4 -= 0x1000; |
|
| 713 |
+ } |
|
| 714 |
+ |
|
| 715 |
+ if (A4 > 0xF000) |
|
| 716 |
+ {
|
|
| 717 |
+ A4 += 0xA000; |
|
| 718 |
+ A4 &= 0xF000; |
|
| 719 |
+ ClearCarry(); |
|
| 720 |
+ } |
|
| 721 |
+ else |
|
| 722 |
+ SetCarry(); |
|
| 723 |
+ |
|
| 724 |
+ uint16_t Ans16 = A4 | A3 | A2 | A1; |
|
| 725 |
+ |
|
| 726 |
+ if ((Registers.A.W ^ Work16) & (Registers.A.W ^ Ans16) & 0x8000) |
|
| 727 |
+ SetOverflow(); |
|
| 728 |
+ else |
|
| 729 |
+ ClearOverflow(); |
|
| 730 |
+ |
|
| 731 |
+ Registers.A.W = Ans16; |
|
| 732 |
+ SetZN(Registers.A.W); |
|
| 733 |
+ } |
|
| 734 |
+ else |
|
| 735 |
+ {
|
|
| 736 |
+ int32_t Int32 = (int32_t) Registers.A.W - (int32_t) Work16 + (int32_t) CheckCarry() - 1; |
|
| 737 |
+ |
|
| 738 |
+ ICPU._Carry = Int32 >= 0; |
|
| 739 |
+ |
|
| 740 |
+ if ((Registers.A.W ^ Work16) & (Registers.A.W ^ (uint16_t) Int32) & 0x8000) |
|
| 741 |
+ SetOverflow(); |
|
| 742 |
+ else |
|
| 743 |
+ ClearOverflow(); |
|
| 744 |
+ |
|
| 745 |
+ Registers.A.W = (uint16_t) Int32; |
|
| 746 |
+ SetZN(Registers.A.W); |
|
| 747 |
+ } |
|
| 748 |
+} |
|
| 749 |
+ |
|
| 750 |
+static inline void SBC (uint8_t Work8) |
|
| 751 |
+{
|
|
| 752 |
+ if (CheckDecimal()) |
|
| 753 |
+ {
|
|
| 754 |
+ uint8_t A1 = Registers.A.W & 0x0F; |
|
| 755 |
+ uint16_t A2 = Registers.A.W & 0xF0; |
|
| 756 |
+ uint8_t W1 = Work8 & 0x0F; |
|
| 757 |
+ uint8_t W2 = Work8 & 0xF0; |
|
| 758 |
+ |
|
| 759 |
+ A1 -= W1 + !CheckCarry(); |
|
| 760 |
+ A2 -= W2; |
|
| 761 |
+ |
|
| 762 |
+ if (A1 > 0x0F) |
|
| 763 |
+ {
|
|
| 764 |
+ A1 += 0x0A; |
|
| 765 |
+ A1 &= 0x0F; |
|
| 766 |
+ A2 -= 0x10; |
|
| 767 |
+ } |
|
| 768 |
+ |
|
| 769 |
+ if (A2 > 0xF0) |
|
| 770 |
+ {
|
|
| 771 |
+ A2 += 0xA0; |
|
| 772 |
+ A2 &= 0xF0; |
|
| 773 |
+ ClearCarry(); |
|
| 774 |
+ } |
|
| 775 |
+ else |
|
| 776 |
+ SetCarry(); |
|
| 777 |
+ |
|
| 778 |
+ uint8_t Ans8 = A2 | A1; |
|
| 779 |
+ |
|
| 780 |
+ if ((Registers.AL ^ Work8) & (Registers.AL ^ Ans8) & 0x80) |
|
| 781 |
+ SetOverflow(); |
|
| 782 |
+ else |
|
| 783 |
+ ClearOverflow(); |
|
| 784 |
+ |
|
| 785 |
+ Registers.AL = Ans8; |
|
| 786 |
+ SetZN(Registers.AL); |
|
| 787 |
+ } |
|
| 788 |
+ else |
|
| 789 |
+ {
|
|
| 790 |
+ int16_t Int16 = (int16_t) Registers.AL - (int16_t) Work8 + (int16_t) CheckCarry() - 1; |
|
| 791 |
+ |
|
| 792 |
+ ICPU._Carry = Int16 >= 0; |
|
| 793 |
+ |
|
| 794 |
+ if ((Registers.AL ^ Work8) & (Registers.AL ^ (uint8_t) Int16) & 0x80) |
|
| 795 |
+ SetOverflow(); |
|
| 796 |
+ else |
|
| 797 |
+ ClearOverflow(); |
|
| 798 |
+ |
|
| 799 |
+ Registers.AL = (uint8_t) Int16; |
|
| 800 |
+ SetZN(Registers.AL); |
|
| 801 |
+ } |
|
| 802 |
+} |
|
| 803 |
+ |
|
| 804 |
+static inline void STA16 (uint32_t OpAddress, enum s9xwrap_t w) |
|
| 805 |
+{
|
|
| 806 |
+ S9xSetWord(Registers.A.W, OpAddress, w); |
|
| 807 |
+ OpenBus = Registers.AH; |
|
| 808 |
+} |
|
| 809 |
+ |
|
| 810 |
+static inline void STA8 (uint32_t OpAddress) |
|
| 811 |
+{
|
|
| 812 |
+ S9xSetByte(Registers.AL, OpAddress); |
|
| 813 |
+ OpenBus = Registers.AL; |
|
| 814 |
+} |
|
| 815 |
+ |
|
| 816 |
+static inline void STX16 (uint32_t OpAddress, enum s9xwrap_t w) |
|
| 817 |
+{
|
|
| 818 |
+ S9xSetWord(Registers.X.W, OpAddress, w); |
|
| 819 |
+ OpenBus = Registers.XH; |
|
| 820 |
+} |
|
| 821 |
+ |
|
| 822 |
+static inline void STX8 (uint32_t OpAddress) |
|
| 823 |
+{
|
|
| 824 |
+ S9xSetByte(Registers.XL, OpAddress); |
|
| 825 |
+ OpenBus = Registers.XL; |
|
| 826 |
+} |
|
| 827 |
+ |
|
| 828 |
+static inline void STY16 (uint32_t OpAddress, enum s9xwrap_t w) |
|
| 829 |
+{
|
|
| 830 |
+ S9xSetWord(Registers.Y.W, OpAddress, w); |
|
| 831 |
+ OpenBus = Registers.YH; |
|
| 832 |
+} |
|
| 833 |
+ |
|
| 834 |
+static inline void STY8 (uint32_t OpAddress) |
|
| 835 |
+{
|
|
| 836 |
+ S9xSetByte(Registers.YL, OpAddress); |
|
| 837 |
+ OpenBus = Registers.YL; |
|
| 838 |
+} |
|
| 839 |
+ |
|
| 840 |
+static inline void STZ16 (uint32_t OpAddress, enum s9xwrap_t w) |
|
| 841 |
+{
|
|
| 842 |
+ S9xSetWord(0, OpAddress, w); |
|
| 843 |
+ OpenBus = 0; |
|
| 844 |
+} |
|
| 845 |
+ |
|
| 846 |
+static inline void STZ8 (uint32_t OpAddress) |
|
| 847 |
+{
|
|
| 848 |
+ S9xSetByte(0, OpAddress); |
|
| 849 |
+ OpenBus = 0; |
|
| 850 |
+} |
|
| 851 |
+ |
|
| 852 |
+static inline void TSB16 (uint32_t OpAddress, enum s9xwrap_t w) |
|
| 853 |
+{
|
|
| 854 |
+ uint16_t Work16 = S9xGetWord(OpAddress, w); |
|
| 855 |
+ ICPU._Zero = (Work16 & Registers.A.W) != 0; |
|
| 856 |
+ Work16 |= Registers.A.W; |
|
| 857 |
+ AddCycles(ONE_CYCLE); |
|
| 858 |
+ S9xSetWord(Work16, OpAddress, w, WRITE_10); |
|
| 859 |
+ OpenBus = Work16 & 0xff; |
|
| 860 |
+} |
|
| 861 |
+ |
|
| 862 |
+static inline void TSB8 (uint32_t OpAddress) |
|
| 863 |
+{
|
|
| 864 |
+ uint8_t Work8 = S9xGetByte(OpAddress); |
|
| 865 |
+ ICPU._Zero = Work8 & Registers.AL; |
|
| 866 |
+ Work8 |= Registers.AL; |
|
| 867 |
+ AddCycles(ONE_CYCLE); |
|
| 868 |
+ S9xSetByte(Work8, OpAddress); |
|
| 869 |
+ OpenBus = Work8; |
|
| 870 |
+} |
|
| 871 |
+ |
|
| 872 |
+static inline void TRB16 (uint32_t OpAddress, enum s9xwrap_t w) |
|
| 873 |
+{
|
|
| 874 |
+ uint16_t Work16 = S9xGetWord(OpAddress, w); |
|
| 875 |
+ ICPU._Zero = (Work16 & Registers.A.W) != 0; |
|
| 876 |
+ Work16 &= ~Registers.A.W; |
|
| 877 |
+ AddCycles(ONE_CYCLE); |
|
| 878 |
+ S9xSetWord(Work16, OpAddress, w, WRITE_10); |
|
| 879 |
+ OpenBus = Work16 & 0xff; |
|
| 880 |
+} |
|
| 881 |
+ |
|
| 882 |
+static inline void TRB8 (uint32_t OpAddress) |
|
| 883 |
+{
|
|
| 884 |
+ uint8_t Work8 = S9xGetByte(OpAddress); |
|
| 885 |
+ ICPU._Zero = Work8 & Registers.AL; |
|
| 886 |
+ Work8 &= ~Registers.AL; |
|
| 887 |
+ AddCycles(ONE_CYCLE); |
|
| 888 |
+ S9xSetByte(Work8, OpAddress); |
|
| 889 |
+ OpenBus = Work8; |
|
| 890 |
+} |
|
| 891 |
+ |
|
| 892 |
+#endif |