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DOS Diagnostic User's Guide

This chapter provides the following information:

Introduction

Prerequisites

Functions List

Function Description

Diagnostic Tests

Error Messages

Introduction

This document provides the information on how to use the DOS diagnostic utilities program on Broadcom 570x Gigabit Integrated Controller, in particular BCM5700 and its related components.

All commands can be entered from DOS prompt or CLI, the Command Line Interface, prompt. When program is run without parameter, the CLI mode is entered. Otherwise, the parameter will be used as command to be executed and exit the program after.

In CLI, assuming there are three devices in the system, all devices information always displayed before each prompt as the following example:

C Brd:Rv    Bus   PCI Spd Base Irq EEP     MAC          Fmw     Configuration
- ------- ------- --- --- ---- -- ---- ------------ ----------- --------------
0 5702:A2 02:0A:0 32  33  FEAF  3 128K 0010180416DB 5702-v2.24a PW,auto
1 5702:A2 02:0B:0 32  33  FEAD 11 128K 0010180416C4 5702-v2.24a PW,auto
2 5703:A2 02:0C:0 32  33  FEAB  9 128K 0010180416B6 5703-v2.21  PW,auto 

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Prerequisites

OS:	Dos 6.22
Software:	b57udiag.exe.

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Functions List

cmd	Functions
upgfrm	Upgrade PXE or Boot Code from a file
dir	Displays the file directory in NVRAM
setwol	Enable/Disable WOL
setpxe	Enable/Disable PXE
setasf	Enable/Diable ASF
nictest	Run a set of NIC tests
exit	Exit the program
device	Show or switch device
version	Display program version
help	Display the commands available
dos	Execute a DOS command
reset	Reset chip
cls	Clear screen
asfprg	Program ASF firmware into NVRAM

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Functions Description

upgfrm

cmd: upgfrm

Description: Upgrade PXE or Boot Code from a file

Syntax: upgrm <pxe:boot> filename

This command reads code from a file and programs it into the pxe or boot area. Both parameters, the programming target "pxe" or "boot" and filename must be specified.

Options:
-f <string>	Input file
-p	Upgrade PXE code
-b	Upgrade Boot code
-d	Do not perform device check

dir

cmd: dir

Description: Displays the file directory in NVRAM

Example:

Entry Type SRAM    Addr EEP  Offset     Length   Execute Version 
----- ------------ --------- ---------- -------- ------- ------- 
       BootCode    08003000  00000200   000011B0 CPUA (2) 5702-v2.24a        
  0    PXE         00010000  000013B0   0000C854 no       2.2.7

setwol

cmd: set wol

Description: Enable/Disable WOL.

Syntax: set wol -e/-d

Options:
-e	Enable WOL
-d	Disable WOL

setpxe

cmd: set pxe

Description: Enable/Disable PXE and set PXE speed.

Syntax: set pxe -switch

Options:
-e	Enable PXE
-d	Disable PXE
-s<DEC>	Specify PXE speed (default = 0)
	Speed: 0 = auto 1 = 10HD 2 = 10FD 3 = 100HD 4 = 100FD

setasf

cmd: setasf

Description: Enable/Disable ASF.

Syntax: setasf -switch

Options:
-e	Enable ASF
-d	Disable ASF

nictest

cmd: nictest

Description: Run a set of NIC tests.

Syntax: nictest [test list]

Example: See Diagnostic Tests for detail on test description.

abcd	runs all tests
b	runs all tests in group b
a3 b1	runs test a3 and b1 only
a124b2	runs tests a1, a2, a4 and b2

If no test list is entered, the diagcfg setting is used.

Options:
-n <DEC>	iteration
-e	run NVRAM verification also

exit

version

cmd: version

Description: Display software version.

Syntax: version

Example:

C:\>b57udiag –version
Copyright (c) 2000, 2001 Broadcom Corporation, all rights reserved
Broadcom NetXtreme User Diagnostic 3.09 (06/14/02)

help

cmd: help

Description: Displays the help commands available.

Syntax: help

Example:

C:\>b57udiag –help
Copyright (c) 2000, 2001 Broadcom Corporation, all rights reserved
Broadcom NetXtreme User Diagnostic 3.09 (06/14/02)

cmd	Functions
upgfrm	Upgrade PXE or Boot Code from a file
dir	Displays the file directory in NVRAM
setwol	Enable/Disable WOL
setpxe	Enable/Disable PXE
setasf	Enable/Diable ASF
nictest	Run a set of NIC tests
exit	Exit the program
device	Show or switch device
version	Display program version
help	Display the commands available
dos	Execute a DOS command
reset	Reset chip
cls	Clear screen
asfprg	Program ASF firmware into NVRAM

dos

asfprg

cmd: asfprg

Description: Program asf firmawre into NVRAM

Syntax: asfprg [init_img [rx_img [tx_img]]]

The default files names are asfinit.bin, asfcpua.bin, and asfcpub.bin, which can be over written by parameters.

Options:
-v<HEX>	Verbose leverl (0,1,2) (def=00000001)

 

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Diagnostic Tests

The tests are divided into four groups: Register Tests, Memory Tests, Miscellaneous Tests, and Data Tests. They numbered as group ‘A’, ‘B’, ‘C’, and ‘D’.

Test Names

Group A.

A1. Indirect Register Test
A2. Control Register Test
A3. Interrupt Test
A4. BIST
A5. PCI Cfg Register Test

Groupt B.

B1. Scratch Pad Test
B2. BD SRAM Test
B3. DMA SRAM Test
B4. MBUF SRAM Test
B5. MBUF SRAM via DMA Test
B6. External SRAM Test

Group C.

C1. EEPROM Test
C2. CPU Test
C3. DMA Test
C4. MII Test
C5. VPD Test
C6. ASF Test
C7. ROM Expansion Test

Group D.

D1. Mac Loopback Test
D2. Phy Loopback Test
D3. RJ45 Loopback Test
D4. MII Miscellaneous Test
D5. MSI Test

 

Error Codes

Code	Message
1.		Got 0x%08x @ 0x%08x. Expected 0x%08x
2.		Cannot run test while chip is running
3.		Invalid NIC device
4.		Read only bit %s got changed after writing zero at offset 0x%X
5.		Read only bit %s got changed after writing 1's at offset 0x%X
6.		Read/Write bit %s did not get cleared after writing zero at offset 0x%X
7.		Read/Write bit %s did not get set after writing 1's at offset 0x%X
8.		BIST failed
9.		Could not generate interrupt
10.  	Test aborted by user
11. 	Tx DMA:Got 0x%08x @ 0x%08x. Expected 0x%08x    
12. 	Rx DMA:Got 0x%08x @ 0x%08x. Expected 0x%08x    
13.		Tx DMA failed
14. 	Rx DMA failed
15.		Data error, got 0x%08X at 0x%08X, expected 0x%08X
16. 	Second read error, got 0x%08X at 0x%08X, expected 0x%08X
17.		Failed writing EEPROM at 0x%04X
18. 	Failed reading EEPROM at 0x%04X
19. 	EEPROM data error, got 0x08X at 0x04X, expected 0x%08X
20. 	Cannot open file %s
21. 	Invalid CPU image file %s
22. 	Invalid CPU image size %d
23. 	Cannot allocate memory
24. 	Cannot reset CPU   
25. 	Cannot release CPU 
26. 	CPU test failed       
27. 	Invalid Test Address Range	
		Valid NIC address is 0x%08x-0x%08x and exclude 0x%08x-0x%08x
28. 	DMA:Got 0x%08x @ 0x%08x. Expected 0x%08x 
29. 	Unsupported PhyId %04X:%04X
30. 	Too many registers specified in the file, max is %d
31. 	Cannot write to VPD memory
32. 	VPD data error, got %08X @ 0x04X, expected %08X
33. 	No good link! Check Loopback plug
34. 	Cannot TX Packet!
35. 	Requested to Tx %d. Only %d is transmitted       
36. 	Expected %d packets. Only %d good packets are received
		%d unknown packets have been received.
		%d bad packets have been received.
37. 	%c%d is an invalid Test
38 		EEPROM checksum error
39 		Error in reading WOL/PXE
40 		Error in writing WOL/PXE
41 		No external memory detected
42 		DMA buffer %04X is large, size must be less than %04X
43 		File size %d is too big, max is %d
44 		Invalid %s
45 		Failed writing 0x%x to 0x%x
46 		*1
47 		*1
48 		*1
49 		*1
50 		Cannot perform task while chip is not running. (need driver)
51 		Cannot open register define file or content is bad
52 		ASF Reset bit did not self-cleared
53 		ATTN_LOC %d cannot be mapped to %cX CPU event bit %d
54 		%s Regsiter is not cleared to zero after reset
55 		Cannot start poll_ASF Timer
56 		poll_ASF bit did not get reset after acknowleged
57 		Timestamp Counter is not counding
58 		%s Timer is not working
59 		Cannot clear bit %s in %cX CPU event register
60 		Invalid "EEPROM_FILENAME" file size, expected %d but only can read %d bytes
61 		Invalid magic value in %s, expected %08x but found %08x
62 		Invalid manufature revision, expected %c but found %c
63 		Invalid Boot Code revision, expected %d.%d but found %d.%d
64 		Cannot write to EEPROM
65 		Cannot read from EEPROM
66 		Invalid Checksum
67 		Invalid Magic Value
68 		Invalid MAC address, expected %02X-%02X-%02X-%02X-%02X-%02X
69 		Slot error, expected an UUT to be found at location %02X:%02X:00
70 		Adjacent memory has been corrupted while testing block 0x%08x-0x%08x 
		Got 0x%08x @ address 0x%08x. Expected 0x%08x

*1 Internal Use. Program will not generate this error. 

Test Descriptions

A1. Indirect Register Test

Command: regtest -i

Function: Using indirect addressing method, writing increment data into MAC hash Register table and read back for verification. The memory read/write is done 100 times while increment test data.

Default: Test Enabled

A2. Control Register Test

Command: regtest

Function: Each Register specified in the configuration contents read only bit and read/write bit defines. The test writing zero and one into the test bits to insure the read only bits are not changed, and read/write bits are changed accordingly.

Default: Test Enabled.

Default Register table

The test will try to read the register configuration file ‘ctrlreg.txt’ for the register defines. If the file does not exist a default register offset and mask bits will be used.

Offset     R/O Mask   R/W Mask
0x00000400 0x00000000 0x007fff8c
0x00000404 0x03800107 0x00000000
0x00000408 0x00000000 0x07c01400
0x0000040c 0x00000000 0xc000007f
0x00000410 0x00000000 0x0000ffff
0x00000414 0x00000000 0xffffffff
0x00000418 0x00000000 0x0000ffff
0x0000041c 0x00000000 0xffffffff
0x00000420 0x00000000 0x0000ffff
0x00000424 0x00000000 0xffffffff
0x00000428 0x00000000 0x0000ffff
0x0000042c 0x00000000 0xffffffff
0x00000430 0x00000000 0xffffffff
0x00000434 0x00000000 0x0fffffff
0x0000043c 0x00000000 0x0000ffff
0x00000440 0x00000000 0x001fffff
0x00000444 0x00000000 0x0000ffff
0x00000448 0x0000ffff 0x00000000
0x0000044c 0x00000000 0x0fffffff
0x00000450 0x00000000 0x00000001
0x00000454 0x00000000 0x00008013
0x00000458 0x00000000 0x00000000
0x0000045c 0x00000000 0x00000070
0x00000460 0x00000009 0x00000000
0x00000464 0x00000000 0x00003fff
0x00000468 0x00000000 0x000007fc
0x0000046c 0x00000001 0x00000000
0x00000470 0x00000000 0xffffffff
0x00000474 0x00000000 0xffffffff
0x00000478 0x00000000 0xffffffff
0x0000047c 0x00000000 0xffffffff
0x00000480 0x00000000 0xffffffff
0x00000484 0x00000000 0xffffffff
0x00000488 0x00000000 0xffffffff
0x0000048c 0x00000000 0xffffffff
0x00000490 0x00000000 0xffffffff
0x00000494 0x00000000 0xffffffff
0x00000498 0x00000000 0xffffffff
0x0000049c 0x00000000 0xffffffff
0x000004a0 0x00000000 0xffffffff
0x000004a4 0x00000000 0xffffffff
0x000004a8 0x00000000 0xffffffff
0x000004ac 0x00000000 0xffffffff
0x000004b0 0x00000000 0xffffffff
0x000004b4 0x00000000 0xffffffff
0x000004b8 0x00000000 0xffffffff
0x000004bc 0x00000000 0xffffffff
0x000004c0 0x00000000 0xffffffff
0x000004c4 0x00000000 0xffffffff
0x000004c8 0x00000000 0xffffffff
0x000004cc 0x00000000 0xffffffff
0x000004d0 0x00000000 0xffffffff
0x000004d4 0x00000000 0xffffffff
0x000004d8 0x00000000 0xffffffff
0x000004dc 0x00000000 0xffffffff
0x000004e0 0x00000000 0xffffffff
0x000004e4 0x00000000 0xffffffff
0x000004e8 0x00000000 0xffffffff
0x000004ec 0x00000000 0xffffffff
0x000004f0 0x00000000 0xffffffff
0x000004f4 0x00000000 0xffffffff
0x000004f8 0x00000000 0xffffffff
0x000004fc 0x00000000 0xffffffff
0x00000500 0x00000000 0x000000f8
0x00000c00 0x00000000 0x00000006
0x00000c04 0x00000004 0x00000000
0x00000c08 0x00000000 0x00000003
0x00000c0c 0x00000000 0x00ffffff
0x00000c80 0xffffffff 0x00000000
0x00000c84 0xffffffff 0x00000000
0x00000c88 0xffffffff 0x00000000
0x00000c8c 0xffffffff 0x00000000
0x00000c90 0xffffffff 0x00000000
0x00000c94 0xffffffff 0x00000000
0x00000c98 0xffffffff 0x00000000
0x00000c9c 0xffffffff 0x00000000
0x00000ca0 0xffffffff 0x00000000
0x00000ca4 0xffffffff 0x00000000
0x00000ca8 0xffffffff 0x00000000
0x00000cac 0xffffffff 0x00000000
0x00000cb0 0xffffffff 0x00000000
0x00000cb4 0xffffffff 0x00000000
0x00000cb8 0xffffffff 0x00000000
0x00000cbc 0xffffffff 0x00000000
0x00000cc0 0xffffffff 0x00000000
0x00000cc4 0xffffffff 0x00000000
0x00000cc8 0xffffffff 0x00000000
0x00000ccc 0xffffffff 0x00000000
0x00000cd0 0xffffffff 0x00000000
0x00000cd4 0xffffffff 0x00000000
0x00000cd8 0xffffffff 0x00000000
0x00000cdc 0xffffffff 0x00000000
0x00001000 0x00000000 0x00000002
0x00001400 0x00000000 0x00000006
0x00001404 0x00000004 0x00000000
0x00001408 0x0000ffff 0x00000000
0x00001440 0x0000000f 0x00000000
0x00001444 0x0000000f 0x00000000
0x00001448 0x0000000f 0x00000000
0x0000144c 0x0000000f 0x00000000
0x00001450 0x0000000f 0x00000000
0x00001454 0x0000000f 0x00000000
0x00001458 0x0000000f 0x00000000
0x0000145c 0x0000000f 0x00000000
0x00001460 0x0000000f 0x00000000
0x00001464 0x0000000f 0x00000000
0x00001468 0x0000000f 0x00000000
0x0000146c 0x0000000f 0x00000000
0x00001470 0x0000000f 0x00000000
0x00001474 0x0000000f 0x00000000
0x00001478 0x0000000f 0x00000000
0x0000147c 0x0000000f 0x00000000
0x00001800 0x00000000 0x00000006
0x00001804 0x00000004 0x00000000
0x00001808 0xffffffff 0x00000000
0x0000180c 0xffffffff 0x00000000
0x00001810 0xffffffff 0x00000000
0x00001814 0xffffffff 0x00000000
0x00001818 0xffffffff 0x00000000
0x0000181c 0xffffffff 0x00000000
0x00001820 0xffffffff 0x00000000
0x00001824 0xffffffff 0x00000000
0x00001828 0xffffffff 0x00000000
0x0000182c 0xffffffff 0x00000000
0x00001830 0xffffffff 0x00000000
0x00001834 0xffffffff 0x00000000
0x00001838 0xffffffff 0x00000000
0x0000183c 0xffffffff 0x00000000
0x00001840 0xffffffff 0x00000000
0x00001844 0xffffffff 0x00000000
0x00001c00 0x00000000 0x00000002
0x00002000 0x00000000 0x0000001e
0x00002004 0x0000001c 0x00000000
0x0000200c 0xffffffff 0x00000000
0x00002010 0x00000000 0x00003fff
0x00002014 0x00000000 0x00000003
0x00002100 0xffffffff 0x00000000
0x00002104 0xffffffff 0x00000000
0x00002108 0xffffffff 0x00000000
0x00002110 0xffffffff 0x00000000
0x00002114 0xffffffff 0x00000000
0x00002118 0xffffffff 0x00000000
0x00002120 0xffffffff 0x00000000
0x00002124 0xffffffff 0x00000000
0x00002128 0xffffffff 0x00000000
0x00002130 0xffffffff 0x00000000
0x00002134 0xffffffff 0x00000000
0x00002138 0xffffffff 0x00000000
0x00002140 0xffffffff 0x00000000
0x00002144 0xffffffff 0x00000000
0x00002148 0xffffffff 0x00000000
0x00002150 0xffffffff 0x00000000
0x00002154 0xffffffff 0x00000000
0x00002158 0xffffffff 0x00000000
0x00002160 0xffffffff 0x00000000
0x00002164 0xffffffff 0x00000000
0x00002168 0xffffffff 0x00000000
0x00002170 0xffffffff 0x00000000
0x00002174 0xffffffff 0x00000000
0x00002178 0xffffffff 0x00000000
0x00002180 0xffffffff 0x00000000
0x00002184 0xffffffff 0x00000000
0x00002188 0xffffffff 0x00000000
0x00002190 0xffffffff 0x00000000
0x00002194 0xffffffff 0x00000000
0x00002198 0xffffffff 0x00000000
0x000021a0 0xffffffff 0x00000000
0x000021a4 0xffffffff 0x00000000
0x000021a8 0xffffffff 0x00000000
0x000021b0 0xffffffff 0x00000000
0x000021b4 0xffffffff 0x00000000
0x000021b8 0xffffffff 0x00000000
0x000021c0 0xffffffff 0x00000000
0x000021c4 0xffffffff 0x00000000
0x000021c8 0xffffffff 0x00000000
0x000021d0 0xffffffff 0x00000000
0x000021d4 0xffffffff 0x00000000
0x000021d8 0xffffffff 0x00000000
0x000021e0 0xffffffff 0x00000000
0x000021e4 0xffffffff 0x00000000
0x000021e8 0xffffffff 0x00000000
0x000021f0 0xffffffff 0x00000000
0x000021f4 0xffffffff 0x00000000
0x000021f8 0xffffffff 0x00000000
0x00002200 0x000003ff 0x00000000
0x00002204 0x000003ff 0x00000000
0x00002208 0x000003ff 0x00000000
0x0000220c 0x000003ff 0x00000000
0x00002210 0x000003ff 0x00000000
0x00002214 0x000003ff 0x00000000
0x00002218 0x000003ff 0x00000000
0x0000221c 0x000003ff 0x00000000
0x00002220 0x000003ff 0x00000000
0x00002224 0x000003ff 0x00000000
0x00002228 0x000003ff 0x00000000
0x0000222c 0x000003ff 0x00000000
0x00002230 0x000003ff 0x00000000
0x00002234 0x000003ff 0x00000000
0x00002238 0x000003ff 0x00000000
0x0000223c 0x000003ff 0x00000000
0x00002240 0x000003ff 0x00000000
0x00002244 0x000003ff 0x00000000
0x00002248 0x000003ff 0x00000000
0x0000224c 0x000003ff 0x00000000
0x00002250 0x000003ff 0x00000000
0x00002254 0x000003ff 0x00000000
0x00002258 0x000003ff 0x00000000
0x00002400 0x00000000 0x0000001e
0x00002404 0x0000001c 0x00000000
0x00002408 0x00000000 0x0000ffff
0x00002440 0x00000000 0xffffffff
0x00002444 0x00000000 0xffffffff
0x0000244c 0x00000000 0xffffffff
0x00002450 0x00000000 0xffffffff
0x00002454 0x00000000 0xffffffff
0x0000245c 0x00000000 0xffffffff
0x00002460 0x00000000 0xffffffff
0x00002464 0x00000000 0xffffffff
0x0000246c 0x00000000 0xffffffff
0x00002470 0xffffffff 0x00000000
0x00002474 0xffffffff 0x00000000
0x00002478 0xffffffff 0x00000000
0x00002480 0xffffffff 0x00000000
0x00002484 0xffffffff 0x00000000
0x00002488 0xffffffff 0x00000000
0x0000248c 0xffffffff 0x00000000
0x00002490 0xffffffff 0x00000000
0x00002494 0xffffffff 0x00000000
0x00002498 0xffffffff 0x00000000
0x0000249c 0xffffffff 0x00000000
0x000024a0 0xffffffff 0x00000000
0x000024a4 0xffffffff 0x00000000
0x000024a8 0xffffffff 0x00000000
0x000024ac 0xffffffff 0x00000000
0x000024b0 0xffffffff 0x00000000
0x000024b4 0xffffffff 0x00000000
0x000024b8 0xffffffff 0x00000000
0x000024bc 0xffffffff 0x00000000
0x000024c0 0xffffffff 0x00000000
0x00002800 0x00000000 0x00000002
0x00002c00 0x00000000 0x00000004
0x00002c04 0x00000004 0x00000000
0x00002c14 0x00000000 0xffffffff
0x00002c18 0x00000000 0xffffffff
0x00002c1c 0x00000000 0xffffffff
0x00003000 0x00000000 0x00000006
0x00003004 0x00000004 0x00000000
0x00003008 0x00000000 0x0000000f
0x0000300c 0x00000000 0x0000001f
0x00003010 0x00000000 0x0000003f
0x00003400 0x00000000 0x00000004
0x00003404 0x00000004 0x00000000
0x00003800 0x00000000 0x00000006
0x00003804 0x00000004 0x00000000
0x00003c00 0x00000000 0x00000002
0x00003c04 0x00000004 0x00000000
0x00003c08 0x00000000 0xffffffff
0x00003c0c 0x00000000 0xffffffff
0x00003c10 0x00000000 0xffffffff
0x00003c14 0x00000000 0xffffffff
0x00003c18 0x00000000 0xffffffff
0x00003c1c 0x00000000 0xffffffff
0x00003c20 0x00000000 0xffffffff
0x00003c24 0x00000000 0xffffffff
0x00003c28 0x00000000 0xffffffff
0x00003c30 0x00000000 0xffffffff
0x00003c34 0x00000000 0xffffffff
0x00003c38 0x00000000 0xffffffff
0x00003c3c 0x00000000 0xffffffff
0x00003c40 0xffffffff 0x00000000
0x00003c44 0xffffffff 0x00000000
0x00003c80 0x00000000 0x000007ff
0x00003c84 0x00000000 0x000007ff
0x00003c88 0x00000000 0x000007ff
0x00003c8c 0x00000000 0x000007ff
0x00003c90 0x00000000 0x000007ff
0x00003c94 0x00000000 0x000007ff
0x00003c98 0x00000000 0x000007ff
0x00003c9c 0x00000000 0x000007ff
0x00003ca0 0x00000000 0x000007ff
0x00003ca4 0x00000000 0x000007ff
0x00003ca8 0x00000000 0x000007ff
0x00003cac 0x00000000 0x000007ff
0x00003cb0 0x00000000 0x000007ff
0x00003cb4 0x00000000 0x000007ff
0x00003cb8 0x00000000 0x000007ff
0x00003cbc 0x00000000 0x000007ff
0x00003cc0 0x00000000 0x000001ff
0x00003cc4 0x00000000 0x000001ff
0x00003cc8 0x00000000 0x000001ff
0x00003ccc 0x00000000 0x000001ff
0x00003cd0 0x00000000 0x000001ff
0x00003cd4 0x00000000 0x000001ff
0x00003cd8 0x00000000 0x000001ff
0x00003cdc 0x00000000 0x000001ff
0x00003ce0 0x00000000 0x000001ff
0x00003ce4 0x00000000 0x000001ff
0x00003ce8 0x00000000 0x000001ff
0x00003cec 0x00000000 0x000001ff
0x00003cf0 0x00000000 0x000001ff
0x00003cf4 0x00000000 0x000001ff
0x00003cf8 0x00000000 0x000001ff
0x00003cfc 0x00000000 0x000001ff
0x00004000 0x00000000 0x03fffffe
0x00004004 0x00000000 0x00000000
0x00004008 0x00000000 0x001fffff
0x0000400c 0x00000000 0x001fffff
0x00004400 0x00000000 0x00000000
0x00004404 0x00000014 0x00000000
0x00004408 0x00000000 0x007fffff
0x0000440c 0x00000000 0x007fffff
0x00004410 0x00000000 0x0000ffff
0x00004414 0x00000000 0x0000ffff
0x00004418 0x00000000 0x0000ffff
0x0000441c 0x00000000 0x0000ffff
0x00004420 0xffffffff 0x00000000
0x00004424 0x00000000 0x0000ffff
0x00004428 0xffffffff 0x00000000
0x0000442c 0xffffffff 0x00000000
0x00004430 0xffffffff 0x00000000
0x00004434 0x00000000 0x000001ff
0x00004438 0x00000000 0x000001ff
0x00004440 0xffffffff 0x00000000
0x00004448 0xffffffff 0x00000000
0x0000444c 0xffffffff 0x00000000
0x00004450 0xffffffff 0x00000000
0x00004454 0xffffffff 0x00000000
0x00004800 0x00000000 0x000003fc
0x00004804 0x00000000 0x00000000
0x00004c00 0x00000000 0x000003fc
0x00004c04 0x000003fc 0x00000000
0x00005800 0x00000000 0xffffffff
0x00005804 0x00000000 0xffffffff
0x00005808 0x00000000 0xffffffff
0x0000580c 0x00000000 0xffffffff
0x00005810 0x00000000 0xffffffff
0x00005814 0x00000000 0xffffffff
0x00005818 0x00000000 0xffffffff
0x0000581c 0x00000000 0xffffffff
0x00005820 0x00000000 0xffffffff
0x00005824 0x00000000 0xffffffff
0x00005828 0x00000000 0xffffffff
0x0000582c 0x00000000 0xffffffff
0x00005830 0x00000000 0xffffffff
0x00005834 0x00000000 0xffffffff
0x00005838 0x00000000 0xffffffff
0x0000583c 0x00000000 0xffffffff
0x00005840 0x00000000 0xffffffff
0x00005844 0x00000000 0xffffffff
0x00005848 0x00000000 0xffffffff
0x0000584c 0x00000000 0xffffffff
0x00005850 0x00000000 0xffffffff
0x00005854 0x00000000 0xffffffff
0x00005858 0x00000000 0xffffffff
0x0000585c 0x00000000 0xffffffff
0x00005860 0x00000000 0xffffffff
0x00005864 0x00000000 0xffffffff
0x00005868 0x00000000 0xffffffff
0x0000586c 0x00000000 0xffffffff
0x00005870 0x00000000 0xffffffff
0x00005874 0x00000000 0xffffffff
0x00005878 0x00000000 0xffffffff
0x0000587c 0x00000000 0xffffffff
0x00005880 0x00000000 0xffffffff
0x00005884 0x00000000 0xffffffff
0x00005888 0x00000000 0xffffffff
0x0000588c 0x00000000 0xffffffff
0x00005890 0x00000000 0xffffffff
0x00005894 0x00000000 0xffffffff
0x00005898 0x00000000 0xffffffff
0x0000589c 0x00000000 0xffffffff
0x000058a0 0x00000000 0xffffffff
0x000058a4 0x00000000 0xffffffff
0x000058a8 0x00000000 0xffffffff
0x000058ac 0x00000000 0xffffffff
0x000058b0 0x00000000 0xffffffff
0x000058b4 0x00000000 0xffffffff
0x000058b8 0x00000000 0xffffffff
0x000058bc 0x00000000 0xffffffff
0x000058c0 0x00000000 0xffffffff
0x000058c4 0x00000000 0xffffffff
0x000058c8 0x00000000 0xffffffff
0x000058cc 0x00000000 0xffffffff
0x000058d0 0x00000000 0xffffffff
0x000058d4 0x00000000 0xffffffff
0x000058d8 0x00000000 0xffffffff
0x000058dc 0x00000000 0xffffffff
0x000058e0 0x00000000 0xffffffff
0x000058e4 0x00000000 0xffffffff
0x000058e8 0x00000000 0xffffffff
0x000058ec 0x00000000 0xffffffff
0x000058f0 0x00000000 0xffffffff
0x000058f4 0x00000000 0xffffffff
0x000058f8 0x00000000 0xffffffff
0x000058fc 0x00000000 0xffffffff
0x00005900 0x00000000 0xffffffff
0x00005904 0x00000000 0xffffffff
0x00005908 0x00000000 0xffffffff
0x0000590c 0x00000000 0xffffffff
0x00005910 0x00000000 0xffffffff
0x00005914 0x00000000 0xffffffff
0x00005918 0x00000000 0xffffffff
0x0000591c 0x00000000 0xffffffff
0x00005920 0x00000000 0xffffffff
0x00005924 0x00000000 0xffffffff
0x00005928 0x00000000 0xffffffff
0x0000592c 0x00000000 0xffffffff
0x00005930 0x00000000 0xffffffff
0x00005934 0x00000000 0xffffffff
0x00005938 0x00000000 0xffffffff
0x0000593c 0x00000000 0xffffffff
0x00005940 0x00000000 0xffffffff
0x00005944 0x00000000 0xffffffff
0x00005948 0x00000000 0xffffffff
0x0000594c 0x00000000 0xffffffff
0x00005950 0x00000000 0xffffffff
0x00005954 0x00000000 0xffffffff
0x00005958 0x00000000 0xffffffff
0x0000595c 0x00000000 0xffffffff
0x00005960 0x00000000 0xffffffff
0x00005964 0x00000000 0xffffffff
0x00005968 0x00000000 0xffffffff
0x0000596c 0x00000000 0xffffffff
0x00005970 0x00000000 0xffffffff
0x00005974 0x00000000 0xffffffff
0x00005978 0x00000000 0xffffffff
0x0000597c 0x00000000 0xffffffff
0x00005980 0x00000000 0xffffffff
0x00005984 0x00000000 0xffffffff
0x00005988 0x00000000 0xffffffff
0x0000598c 0x00000000 0xffffffff
0x00005990 0x00000000 0xffffffff
0x00005994 0x00000000 0xffffffff
0x00005998 0x00000000 0xffffffff
0x0000599c 0x00000000 0xffffffff
0x000059a0 0x00000000 0xffffffff
0x000059a4 0x00000000 0xffffffff
0x000059a8 0x00000000 0xffffffff
0x000059ac 0x00000000 0xffffffff
0x000059b0 0x00000000 0xffffffff
0x000059b4 0x00000000 0xffffffff
0x000059b8 0x00000000 0xffffffff
0x000059bc 0x00000000 0xffffffff
0x000059c0 0x00000000 0xffffffff
0x000059c4 0x00000000 0xffffffff
0x000059c8 0x00000000 0xffffffff
0x000059cc 0x00000000 0xffffffff
0x000059d0 0x00000000 0xffffffff
0x000059d4 0x00000000 0xffffffff
0x000059d8 0x00000000 0xffffffff
0x000059dc 0x00000000 0xffffffff
0x000059e0 0x00000000 0xffffffff
0x000059e4 0x00000000 0xffffffff
0x000059e8 0x00000000 0xffffffff
0x000059ec 0x00000000 0xffffffff
0x000059f0 0x00000000 0xffffffff
0x000059f4 0x00000000 0xffffffff
0x000059f8 0x00000000 0xffffffff
0x000059fc 0x00000000 0xffffffff
0x00005a04 0x00000000 0xffffffff
0x00005a0c 0x00000000 0xffffffff
0x00005c10 0x00000000 0x00000005
0x00005c14 0xffffffff 0x00000000
0x00005c24 0xffffffff 0x00000000
0x00005c34 0xffffffff 0x00000000
0x00005c44 0xffffffff 0x00000000
0x00005c54 0xffffffff 0x00000000
0x00005c64 0xffffffff 0x00000000
0x00005c74 0xffffffff 0x00000000
0x00005c84 0xffffffff 0x00000000
0x00005c94 0xffffffff 0x00000000
0x00005ca4 0xffffffff 0x00000000
0x00005cb4 0xffffffff 0x00000000
0x00005cc4 0xffffffff 0x00000000
0x00005cd4 0xffffffff 0x00000000
0x00005ce4 0xffffffff 0x00000000
0x00005cf4 0xffffffff 0x00000000
0x00005d04 0xffffffff 0x00000000
0x00005d14 0xffffffff 0x00000000
0x00006000 0x00000000 0x0000007e
0x00006400 0x00000000 0x00000002
0x00006800 0x00000000 0xfffffff7
0x00006804 0x0001e000 0x00000ffe
0x00006808 0x00000000 0x03ffc008

A3. Interrupt Test

Command: intrtest

Function: This test verifies the interrupt functionality. It enables interrupt and waits for interrupt to occur. It waits for 500ms and reports error if could not generate interrupts.

Default: Enabled

A4. BIST

Command: bist

Function: Hardware Built-In-Self-Test (BIST). This test initiates BIST, and wait for the test result returned by hardware.

Default: Due to the intermittent failure, this test is currently disabled by default

A5. PCI Cfg Register Test

Command: pcicfg

Function: This test verifies the access integrity of the PCI config registers.

B1. Scratch Pad Test

Command: memtest -s

Function: This test tests the scratch pad SRAM on board. The following tests are performed:

Data Pattern Test: Write test data into SRAM, read back to ensure data is correct. The test data used is 0x00000000, 0xffffffff, 0xaa55aa55, and 0x55aa55aa.

Alternate Data Pattern Test: Write test data into SRAM. Write complement test data into next address. Read back both data to insure the data is correct. After the test, the program reads back data one more time to insure the data stays correct. The test data used is 0x00000000, 0xffffffff, 0xaa55aa55, and 0x55aa55aa.

Address Test: Write each address with unique increment data. Read back data to insure data is correct. After fill the entire data with the unique data, the program reads back data again to insure data stays the same.

WalkingOne bit Test: For each address. Data one is written and read back for testing. Then shift the data left one bit, so the data becomes two and do the same test again. It repeats for 32 times until the test bit is shifted out of test data. The same is test is repeated for entire test range.

Pseudo Random Data Test: A pre-calculated pseudo random data is used to write a unique data into each test RAM. After the first pass the test, the program reads back one more time to insure data stays correct.

Default: Enabled

B2. BD SRAM Test

Command: memtest -b

Function: This test tests the BD SRAM. This performs exact the same way of testing as described in B1. Scratch Pad Test.

Default: Enabled

B3. DMA SRAM Test

Command: memtest -d

Function: It tests DMA SRAM by performing the tests described in test B1. The Scratch Pad Test.

Default: Enabled

B4. MBUF SRAM Test

Command: memtest -m

Function: It tests DMA SRAM by performing the tests described in test B1. The Scratch Pad Test.

Default: Enabled

B5. MBUF SRAM via DMA Test

Command: memtest -x

Function: Eight test pattern data are used in the test. They are described below. A 0x1000 sized data buffer is used for this test. Before each pattern test, the buffer is initialized and filled with the test pattern. It then, performs size 0x1000 transmit DMA from host buffer to NIC MBUF memory. Verify the data integrity in MBUF against host memory and repeat the DMA for the entire MBUF buffer. Then it performs receive DMA from NIC to host. The 0x1000-byte test buffer is cleared to zero before each receive-DMA. Verify the data integrity and test is repeated for the entire MBUF SRAM range.

Test Pattern	Description
"16 00's 16 FF's"	Full the entire host DMA buffer with 16 bytes of 00’s and then 16 bytes of FF’s.
"16 FF's 16 0's"	Full the entire host DMA buffer with 16 bytes of 00’s and then 16 bytes of FF’s.
"32 00's 32 FF's"	Full the entire host DMA buffer with 32 bytes of 00’s and then 32 bytes of FF’s.
"32 FF's 32 00's"	Full the entire host DMA buffer with 32 bytes of FF’s and then 32 bytes of 00’s.
"00000000's"	Full the entire host DMA buffer with all zeros.
"FFFFFFFF's"	Full the entire host DMA buffer with all FF’s.
"AA55AA55's"	Full the entire host DMA buffer with data 0xAA55AA55.
"55AA55AA's"	Full the entire host DMA buffer with data 0xAA55AA55.

Default: Enabled

B6. External SRAM Test

Command: memtest -e

Function: It tests DMA SRAM by performing the tests described in test B1. The Scratch Pad Test.

Default: Disabled

C1. EEPROM Test

Command: setest

Function: An increment test data is used in EEPROM test. It fills the test data into the test range and read back to verity the content. After the test, it fills data with zero to clear the memory.

Default: Enabled

C2. CPU Test

Command: cputest

Function: This test opens the file cpu.bin. If file exists and content is good, it loads code to rx and tx CPU and verifies CPU execution.

Default: Enabled

C3. DMA Test

Command: dmatest

Function: Both high and low priorities DMA are tested. It moves data from host memory to NIC SRAM, verifies data, and then moves data back to host memory again to verify data.

Default: Enabled

C4. MII Test

Command: miitest

Function: The function is identical to A2. Control Register Test. Each Register specified in the configuration contents read only bit and read/write bit defines. The test writing zero and one into the test bits to insure the read only bits value are not changed, and read/write bits are changed accordingly.

Default: Test Enabled.

Default Register table

The test will try to read the register configuration file ‘miireg.txt’ for the register defines. If the file does not exists, the following table is used:

Offset 		R/O Mask	R/W Mask
0x00 		0x0000 		0x7180 
0x02 		0xffff 		0x0000 
0x03 		0xffff 		0x0000 
0x04 		0x0000 		0xffff 
0x05 		0xefff 		0x0000 
0x06 		0x0001 		0x0000 
0x07 		0x0800 		0xb7ff 
0x08 		0xffff 		0x0000 
0x09 		0x0000 		0xff00 
0x0a 		0x7c00 		0x0000 
0x10 		0x0000 		0xffbf 
0x11 		0x3300 		0x0000 
0x19 		0x001f 		0x0000 
0x1e 		0x0000 		0xffff 
0x1f 		0x0000 		0xffff 

C5. VPD Test

Command: vpdtest

Function: It saves the content of VPD first before perform the test. Once it is done, it writes one of the five pattern test data, 0xff, 0xaa, 0x55, increment data, or decrement data, into VPD memory. By default, increment data pattern is used. It writes and reads back the data for the entire test range, and then restores the original content.

Default: Disabled

C6. ASF Test

1. Reset test.

   Setting reset bit, poll for self-clearing. Verify reset value of registers.

2. Event Mapping Test

   Setting SMB_ATTN bit. By changing ASF_ATTN LOC bits, verify the mapping bits in TX_CPU or RX_CPU event bits.

3. Counter Test

C7. ROM Expansion Test

Command: romtest

Function: This function tests the ability to enable/disable/access the expansion rom on the device.

D1. Mac Loopback Test

Command: pkttest -m

Function: This is internal loopback data transmit/receive test. It initializes MAC into internal loopback mode, and transmits 100 packets. The data should be routed back to receive channel and receive by the receive routine, which verifies the integrity of data. One Gigabit rate is used for this test.

Default: Enabled

D2. Phy Loopback Test

Command: pkttest -p

Function: This test is same as D1. Mac Loopback Test except, the data is routed back via physical layer device. One Giga bit rate is used for this test.

Default: Enabled

D3. RJ45 Loopback Test

D4. MII Miscellaneous Test

Command: None

Function: This function tests the auto-polling and phy-interrupt capabilities. These are the functionalities of the phy.

Default: Enabled

D5. MSI Test

Command: msitest

Function:

Default: Disabled

 

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Error Messages

/* 0 */ 	"PASS",
/* 1 */ 	"Got 0x%08X @ 0x%08X. Expected 0x%08X",
/* 2 */ 	"Cannot perform task while chip is running",
/* 3 */ 	"Invalid NIC device",
/* 4 */		"Read only bit %s got changed after writing zero at offset 0x%X",
/* 5 */ 	"Read only bit %s got changed after writing one at offset 0x%X",
/* 6 */ 	"Read/Write bit %s did not get cleared after writing zero at offset 0x%X",
/* 7 */		"Read/Write bit %s did not get set after writing one at offset 0x%X",
/* 8 */ 	"BIST failed",
/* 9 */ 	"Could not generate interrupt",
/* 10 */ 	"Aborted by user",
/* 11 */ 	"Tx DMA:Got 0x%08X @ 0x%08X. Expected 0x%08X",    
/* 12 */ 	"Rx DMA:Got 0x%08X @ 0x%08X. Expected 0x%08X",    
/* 13 */ 	"Tx DMA failed",
/* 14 */ 	"Rx DMA failed",
/* 15 */ 	"Data error, got 0x%08X at 0x%08X, expected 0x%08X",
/* 16 */ 	"Second read error, got 0x%08X at 0x%08X, expected 0x%08X",
/* 17 */ 	"Failed writing EEPROM at 0x%04X",
/* 18 */ 	"Failed reading EEPROM at 0x%04X",
/* 19 */ 	"EEPROM data error, got 0x08X at 0x04X, expected 0x%08X",
/* 20 */ 	"Cannot open file %s",
/* 21 */ 	"Invalid CPU image file %s",
/* 22 */ 	"Invalid CPU image size %d",
/* 23 */ 	"Cannot allocate memory",
/* 24 */ 	"Cannot reset CPU",    
/* 25 */ 	"Cannot release CPU", 
/* 26 */ 	"CPU test failed",       
/* 27 */ 	"Invalid Test Address Range\nValid NIC address is 0x%08X-0x%08X and exclude 0x%08X-0x%08X",
/* 28 */    "DMA:Got 0x%08X @ 0x%08X. Expected 0x%08X", 
/* 29 */   	"Unsupported PhyId %04X:%04X",
/* 30 */   	"Too many registers specified in the file, max is %d",
/* 31 */ 	"Cannot write to VPD memory",
/* 32 */ 	"VPD data error, got %08X @ 0x04X, expected %08X",
/* 33 */ 	"No good link! Check Loopback plug",
/* 34 */ 	"Cannot TX Packet!", 
/* 35 */ 	"Requested to Tx %d. Only %d is transmitted",       
/* 36 */	"Expected %d packets. Only %d good packet(s) have been received\n%d unknown packets have been received.\n%d bad packets have been received.",
/* 37 */ 	"%c%d is an invalid Test",
/* 38 */ 	"EEPROM checksum error",
/* 39 */ 	"Error in reading WOL/PXE",
/* 40 */ 	"Error in writing WOL/PXE",
/* 41 */ 	"No external memory detected",
/* 42 */ 	"DMA buffer %04X is large, size must be less than %04X",  
/* 43 */ 	"File size %d is too big, max is %d",
/* 44 */ 	"Invalid %s",
/* 45 */ 	"Failed writing 0x%x to 0x%x",
/* 46 */ 	"",
/* 47 */ 	"Ambiguous command",
/* 48 */ 	"Unknown command",
/* 49 */ 	"Invalid option",
/* 50 */ 	"Cannot perform task while chip is not running. (need driver)",
/* 51 */ 	"Cannot open register define file or content is bad",
/* 52 */ 	"ASF Reset bit did not self-cleared",
/* 53 */ 	"ATTN_LOC %d cannot be mapped to %cX CPU event bit %d",
/* 54 */ 	"%s Regsiter is not cleared to zero after reset",
/* 55 */ 	"Cannot start poll_ASF Timer",
/* 56 */ 	"poll_ASF bit did not get reset after acknowleged",
/* 57 */ 	"Timestamp Counter is not counding",
/* 58 */ 	"%s Timer is not working",
/* 59 */ 	"Cannot clear bit %s in %cX CPU event register",
/* 60 */ 	"Invalid "EEPROM_FILENAME" file size, expected %d but only can read %d bytes",
/* 61 */ 	"Invalid magic value in %s, expected %08x but found %08x",
/* 62 */ 	"Invalid manufature revision, expected %c but found %c",
/* 63 */ 	"Invalid Boot Code revision, expected %d.%d but found %d.%d",
/* 64 */ 	"Cannot write to EEPROM",
/* 65 */ 	"Cannot read from EEPROM",
/* 66 */ 	"Invalid Checksum",
/* 67 */ 	"Invalid Magic Value",
/* 68 */ 	"Invalid MAC address, expected %02X-%02X-%02X-%02X-%02X-%02X",
/* 69 */ 	"Slot error, expected an UUT to be found at location %02X:%02X:00",
/* 70 */ 	"Adjacent memory has been corrupted while testing block 0x%08x-0x%08x\nGot 0x%08x @ address 0x%08x. Expected 0x%08x",
/* 71 */ 	"The function is not Supported in this chip",
/* 72 */ 	"Packets received with CRC error",
/* 73 */ 	"MII error bits set: %04x",
/* 74 */ 	"CPU does not initialize MAC address register correctly",
/* 75 */ 	"Invalid firmware file format",
/* 76 */ 	"Resetting TX CPU Failed",
/* 77 */ 	"Resetting RX CPU Failed",
/* 78 */ 	"Invalid MAC address",
/* 79 */ 	"Mac address registers are not initialized correctly",
/* 80 */ 	"EEPROM Bootstrap checksum error",

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